From the Publisher: Application-specific standard products (ASSPs) and application-specific integrated circuits (ASICs) are expected to become more than fifty percent of the $10 billion VLSI Digital Signal Processing ...
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ISBN:
(纸本)0792397444
From the Publisher: Application-specific standard products (ASSPs) and application-specific integrated circuits (ASICs) are expected to become more than fifty percent of the $10 billion VLSI Digital Signal Processing (DSP) market in year 2000. With rapidly shrinking time-to-market (TTM) requirements, and multiple design goals that seek to optimize sample rate, clock speed, area, and power, the novel core-based behavioral synthesis methodology presented in this book shows how organizations can meet these new challenges effectively and consistently over the next decade. The authors show how VLSI chips can be rapidly designed within a VHDL-based synthesis environment using a pre-designed library of core components. The core library represents synthesizable units of behavior (function and control) that are both application-specific and organization-specific, empowering the chip designer with a competitive advantage. The key to the quick-turnaround is the high amount of systematic reuse utilized within the design methodology. The percolation of accurate power, speed, area, and timing information to higher levels of abstraction allows rapid and efficient exploration of the design space facilitating the optimization of these objectives individually or concurrently. System integration and test of ASICs into board-level designs is also facilitated. Quick-Turnaround ASIC Design with VHDL: Core-Based Behavioral Synthesis presents a new approach to behavioral synthesis that uses a pre-designed library of DSP cores, providing a highly competitive alternative to existing high-level synthesis tools for DSP.
From the Publisher: Software Synthesis from Dataflow Graphs addresses the problem of generating efficient software implementations from applications specified as synchronous dataflow graphs for programmable digital si...
ISBN:
(纸本)0792397223
From the Publisher: Software Synthesis from Dataflow Graphs addresses the problem of generating efficient software implementations from applications specified as synchronous dataflow graphs for programmable digital signal processors (DSPs) used in embedded real-time systems. Software Synthesis from Dataflow Graphs reviews the state-of-the-art in constructing static, memory-optimal schedules for programs expressed as SDF graphs. Code size reduction is obtained by the careful organization of loops in the target code. Data buffering is optimized by constructing the loop hierarchy in provably optimal ways for many classes of SDF graphs. The central result is a uniprocessor scheduling framework that provably synthesizes the most compact looping structures, called single appearance schedules, for a certain class of SDF graphs. In addition, algorithms and heuristics are presented that generate single appearance schedules optimized for data buffering usage. Numerous practical examples and extensive experimental data are provided to illustrate the efficacy of these techniques.
From the Publisher: Object-Oriented Behavioral Specifications encourages the builders of complex information systems to accelerate the move to using the approach of a scientific discipline in analysis rather than the ...
ISBN:
(纸本)0792397789;9780792397786;9780585275246
From the Publisher: Object-Oriented Behavioral Specifications encourages the builders of complex information systems to accelerate the move to using the approach of a scientific discipline in analysis rather than the approach of a craft. The focus is on understanding customers needs and on precise specification of understanding gained through analysis. The papers in this book show various ways of designing elegant and clear specifications which are reusable, leading to savings of intellectual effort, time, and money, and which contribute to the reliability ofS software and systems.
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