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Trellis Decoding of Block Codes 1

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丛书名： The springer international series in engineering and computer science

1000年

作者： Bahram Honary Garik Markarian

ISBN: (数字)9781461562795

ISBN: (纸本)9780792398608;9781461378822

It is a great pleasure to be asked to write the Preface for this book on trellis decoding of error correcting block codes. The subject is extremely significant both theoretically and practically, and is very timely because of recent devel opments in the microelectronic implementation and range of application of error-control coding systems based on block codes. The authors have been notably active in signal processing and coding research and development for several years, and therefore very well placed to contribute to the state of the art on the subject of trellis decoding. In particular, the book represents a unique approach to many practical aspects of the topic. As the authors point out, there are two main classes of error control codes: block codes and convolutinal codes. Block codes came first historically and have a well-developed mathematical structure. Convolutional codes come later, and have developed heuristically, though a more formal treatment has emerged via recent developments in the theory of symbolic dynamics. Max imum likelihood (ML) decoding of powerful codes in both these classes is computationally complex in the general case; that is, ML decoding fails into the class of NP-hard computational problems. This arieses because the de coding complexity is an exponential function of key parameters of the code.

关键词： Electrical engineering Signal, Image and Speech Processing

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Algorithmic and Register-Transfer Level Synthesis: The System Architect’s Workbench 1

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丛书名： The springer international series in engineering and computer science

1000年

作者： D. E. Thomas E. D. Lagnese R. A. Walker J. A. Nestor J. V. Rajan R. L. Blackburn

ISBN: (数字)9781461315193

ISBN: (纸本)9780792390534;9781461288152

Recently there has been increased interest in the development of computer-aided design programs to support the system level designer of integrated circuits more actively. Such design tools hold the promise of raising the level of abstraction at which an integrated circuit is designed, thus releasing the current designers from many of the details of logic and circuit level design. The promise further suggests that a whole new group of designers in neighboring engineering and science disciplines, with far less understanding of integrated circuit design, will also be able to increase their productivity and the functionality of the systems they design. This promise has been made repeatedly as each new higher level of computer-aided design tool is introduced and has repeatedly fallen short of fulfillment. This book presents the results of research aimed at introducing yet higher levels of design tools that will inch the integrated circuit design community closer to the fulfillment of that promise. 1. 1. SYNTHESIS OF INTEGRATED CmCUITS In the integrated circuit (Ie) design process, a behavior that meets certain specifications is conceived for a system, the behavior is used to produce a design in terms of a set of structural logic elements, and these logic elements are mapped onto physical units. The design process is impacted by a set of constraints as well as technological information (i. e. the logic elements and physical units used for the design).

关键词： Circuits and Systems Electrical engineering computer-Aided engineering (CAD, CAE) and Design

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Logic Minimization Algorithms for VLSI Synthesis 1

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丛书名： The springer international series in engineering and computer science

1000年

ISBN: (数字)9781461328216

ISBN: (纸本)9780898381641;9781461297840

The roots of the project which culminates with the writing of this book can be traced to the work on logic synthesis started in 1979 at the IBM Watson Research Center and at University of California, Berkeley. During the preliminary phases of these projects, the impor tance of logic minimization for the synthesis of area and performance effective circuits clearly emerged. In 1980, Richard Newton stirred our interest by pointing out new heuristic algorithms for two-level logic minimization and the potential for improving upon existing approaches. In the summer of 1981, the authors organized and participated in a seminar on logic manipulation at IBM Research. One of the goals of the seminar was to study the literature on logic minimization and to look at heuristic algorithms from a fundamental and comparative point of view. The fruits of this investigation were surprisingly abundant: it was apparent from an initial implementation of recursive logic minimiza tion (ESPRESSO-I) that, if we merged our new results into a two-level minimization program, an important step forward in automatic logic synthesis could result. ESPRESSO-II was born and an APL implemen tation was created in the summer of 1982. The results of preliminary tests on a fairly large set of industrial examples were good enough to justify the publication of our algorithms. It is hoped that the strength and speed of our minimizer warrant its Italian name, which denotes both express delivery and a specially-brewed black coffee.

关键词： computer-Aided engineering (CAD, CAE) and Design Computational Mathematics and Numerical Analysis Electrical engineering

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Broadband Wireless Access 1

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丛书名： The springer international series in engineering and computer science

1000年

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Wireless Communications 1

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丛书名： The springer international series in engineering and computer science

1000年

作者： Jack M. Holtzman David J. Goodman

ISBN: (数字)9781461531449

ISBN: (纸本)9780792393160;9781461363767

The past several years have been exciting for wireless communications. The public appetite for new services and equipment continues to grow. The Second Generation systems that have absorbed our attention during recent years will soon be commercial realities. In addition to these standard systems, we see an explosion of technical alternatives for meeting the demand for wireless communications. The debates about competing solutions to the same problem are a sign of the scientific and technical immaturity of our field. Here we have an application in search of technology rather than the reverse. This is a rare event in the information business. Happily, there is a growing awareness that we can act now to prevent the technology shortage from becoming more acute at the end of this decade. By then, market size and user expectations will surpass the capabilities of today's emerging systems. Third Generation Wireless Information Networks will place even greater burdens on technology than their ancestors. To discuss these issues, Rutgers University WINLAB plays host to a series of Workshops on Third Generation Wireless Information Networks. The first one, in 1989, had the flavor of a gathering of committed enthusiasts of an interesting niche of telephony. Presentations and discussions centered on the problems of existing cellular systems and technical alternatives to alleviating them. Although the more distant future was the announced theme of the Workshop, it drew only a fraction of our attention.

关键词： Communications engineering, Networks Electrical engineering Signal, Image and Speech Processing

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Models for Large Integrated Circuits 1

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丛书名： The springer international series in engineering and computer science

1000年

作者： Patrick Dewilde Zhen-Qui Ning

ISBN: (数字)9781461315551

ISBN: (纸本)9780792391159;9781461288336

A modern microelectronic circuit can be compared to a large construction, a large city, on a very small area. A memory chip, a DRAM, may have up to 64 million bit locations on a surface of a few square centimeters. Each new generation of integrated circuit- generations are measured by factors of four in overall complexity -requires a substantial increase in density from the current technology, added precision, a decrease of the size of geometric features, and an increase in the total usable surface. The microelectronic industry has set the trend. Ultra large funds have been invested in the construction of new plants to produce the ultra large-scale circuits with utmost precision under the most severe conditions. The decrease in feature size to submicrons -0.7 micron is quickly becoming availabl- does not only bring technological problems. New design problems arise as well. The elements from which microelectronic circuits are build, transistors and interconnects, have different shape and behave differently than before. Phenomena that could be neglected in a four micron technology, such as the non-uniformity of the doping profile in a transistor, or the mutual capacitance between two wires, now play an important role in circuit design. This situation does not make the life of the electronic designer easier: he has to take many more parasitic effects into account, up to the point that his ideal design will not function as originally planned.

关键词： Electrical engineering Signal, Image and Speech Processing

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Visual Communication 1

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丛书名： The springer international series in engineering and computer science

1000年

作者： Friedrich O. Huck Carl L. Fales Zia-ur Rahman

ISBN: (数字)9781475725681

ISBN: (纸本)9780792399568;9781441951809

not a coincidence, but is the result of a carefully planned time of landing (sun elevation) and lander orientation (sun azimuth). * The picture was started 25 seconds after touchdown and took 15 seconds to acquire. The alternating bright and dark vertical striations at the left side of the image and the fine particles deposited on the footpad at the right side were caused by a turbulent cloud of dust raised by the lander's retrorockets. t *F. O. Huck and S. D. Wall, "Image quality prediction: An aid to the Viking Lander imaging investigation on Mars. " Appl. Opt. 15, 1748-1766 (1976). tT. A. Mutch, A. B. Binder, F. O. Huck, E. C. Levinthal, S. Liebes, Jr. , E. C. Morris, W. R. Patterson, J. B. Pollack, C. Sagan and G. R. Taylor, "The Surface of Mars: The view from the Viking 1 Lander. " science 193, 791-801 (1976). VISUAL COMMUNICATION An Information Theory Approach Chapter 1 Introduction 1. 1 OBJECTIVE l The fundamental problem of communication, as Shannon stated it, is that of reproducing at one point either exactly or approximately a message selected at another point. In the classical model of communication (Fig. 1. 1), the infor mation source selects a desired message from a set of possible messages which the transmitter changes into the signal that is actually sent over the commu nication channel to the receiver. The receiver changes this signal back into a message, and hands this message to the destination.

关键词： Communications engineering, Networks Image Processing and computer Vision Electrical engineering Signal, Image and Speech Processing

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Hierarchical Modeling for VLSI Circuit Testing 1

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丛书名： The springer international series in engineering and computer science

1000年

作者： Debashis Bhattacharya John P. Hayes

ISBN: (数字)9781461315278

ISBN: (纸本)9780792390589;9781461288190

Test generation is one of the most difficult tasks facing the designer of complex VLSI-based digital systems. Much of this difficulty is attributable to the almost universal use in testing of low, gate-level circuit and fault models that predate integrated circuit technology. It is long been recognized that the testing prob lem can be alleviated by the use of higher-level methods in which multigate modules or cells are the primitive components in test generation; however, the development of such methods has proceeded very slowly. To be acceptable, high-level approaches should be applicable to most types of digital circuits, and should provide fault coverage comparable to that of traditional, low-level methods. The fault coverage problem has, perhaps, been the most intractable, due to continued reliance in the testing industry on the single stuck-line (SSL) fault model, which is tightly bound to the gate level of abstraction. This monograph presents a novel approach to solving the foregoing problem. It is based on the systematic use of multibit vectors rather than single bits to represent logic signals, including fault signals. A circuit is viewed as a collection of high-level components such as adders, multiplexers, and registers, interconnected by n-bit buses. To match this high-level circuit model, we introduce a high-level bus fault that, in effect, replaces a large number of SSL faults and allows them to be tested in parallel. However, by reducing the bus size from n to one, we can obtain the traditional gate-level circuit and models.

关键词： computer-Aided engineering (CAD, CAE) and Design Electrical engineering

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CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters 2

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丛书名： The springer international series in engineering and computer science

1000年

作者： Rudy Plassche

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VLSI CAD Tools and Applications 1

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丛书名： The springer international series in engineering and computer science

1000年

作者： Wolfgang Fichtner Martin Morf

ISBN: (数字)9781461319856

ISBN: (纸本)9781461291862

The summer school on VLSf GAD Tools and Applications was held from July 21 through August 1, 1986 at Beatenberg in the beautiful Bernese Oberland in Switzerland. The meeting was given under the auspices of IFIP WG 10. 6 VLSI, and it was sponsored by the Swiss Federal Institute of Technology Zurich, Switzerland. Eighty-one professionals were invited to participate in the summer school, including 18 lecturers. The 81 participants came from the following countries: Australia (1), Denmark (1), Federal Republic of Germany (12), France (3), Italy (4), Norway (1), South Korea (1), Sweden (5), United Kingdom (1), United States of America (13), and Switzerland (39). Our goal in the planning for the summer school was to introduce the audience into the realities of CAD tools and their applications to VLSI design. This book contains articles by all 18 invited speakers that lectured at the summer school. The reader should realize that it was not intended to publish a textbook. However, the chapters in this book are more or less self-contained treatments of the particular subjects. Chapters 1 and 2 give a broad introduction to VLSI Design. Simulation tools and their algorithmic foundations are treated in Chapters 3 to 5 and 17. Chapters 6 to 9 provide an excellent treatment of modern layout tools. The use of CAD tools and trends in the design of 32-bit microprocessors are the topics of Chapters 10 through 16. Important aspects in VLSI testing and testing strategies are given in Chapters 18 and 19.

关键词： Circuits and Systems Electrical engineering computer-Aided engineering (CAD, CAE) and Design

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