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检索条件"丛书名=Theory in Practice"

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Heterogeneous systems design: a UML-based approach

Heterogeneous systems design: a UML-based approach

引用

EUROMICRO Conference

作者： S.D. Barrios J.C. Lopez Departamento de Ingeniería Electrónica E.T.S.I. Telecomuncación Universidad Politécnica de Madrid Madrid Spain

Inherent complexity of heterogeneous system design has been traditionally faced by means of abstraction and design automation. At the highest level of abstraction, the Unified Modeling Language (UML) can be extended to model the whole system under design in an homogeneous fashion. In this paper, a design methodology based on the UML is presented. The benefits of using such a methodology are highlighted taking the design of an MPEG-4 decoder as an example.

关键词： Unified modeling language Hardware MPEG 4 Standard Decoding Digital signal processing Design methodology Assembly Natural languages CMOS technology Telecommunications

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Checking integrity during dynamic reordering in decision diagrams

Checking integrity during dynamic reordering in decision dia...

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EUROMICRO Conference

作者： R. Drechsler Institute of Computer Science Albert Ludwig University Freiburg im Breisgau Germany

Decision Diagrams (DDs) are the state-of-the-art data structure in VLSI CAD. They are used in many safety critical applications, like verification. Recently a new approach based on recursive checksum computation has been presented that showed how the correctness of the data structures could be verified by on-line and off-line tests. In this paper it is shown that these techniques can also be integrated in DD packages making use of dynamic reordering methods, like variable reordering and reordering based synthesis. The correctness of the data structures can be verified by (nearly) no overhead. Experimental results are presented to demonstrate the efficiency of this approach.

关键词： Packaging Circuits Design automation Data structures Boolean functions Very large scale integration Protocols Minimization methods Computer science Application software

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Reconfiguration mechanism for an IP block based interconnection

Reconfiguration mechanism for an IP block based interconnect...

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EUROMICRO Conference

作者： K. Kuusilinna P. Liimatainen T. Hamalainen J. Saarinen Signal Processing Laboratory Tampere University of Technology Tampere Finland

This paper presents a reconfiguration mechanism for an on-chip interconnection scheme called Heterogeneous IP Block Interconnection (HIBI). Required memory structures and logical signal operations for the different configurations are explained. The possible applications for this kind of reconfiguration are discussed, including ways to enhance system performance, ease of design re-use, low power designs and fault tolerance. An overview of HIBI is given as a background information for the reader. The HIBI architecture is designed to exploit VHDL synthesis but the concept could conceivably be transferred to any synthesis environment.

关键词： Clocks Protocols Routing Network synthesis Data communication Energy consumption Multiprocessor interconnection networks Signal processing Laboratories Intellectual property

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Software synthesis for system level design using process execution trees

Software synthesis for system level design using process exe...

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EUROMICRO Conference

作者： L.J. van Bokhoven J.P.M. Voeten M.C.W. Geilen Section of Information and Communication Systems Department of Electrical Engineering Eindhovan University of Technology Eindhoven Netherlands

Software synthesis for system level design languages becomes feasible because the current technology, pricing and application trends will most likely alleviate the industrial emphasis on real-time operating systems minimisation. Automatic code generation also becomes necessary, because of increasing product complexity and decreasing design time. This paper discusses software synthesis for a realistic system level design language, to generate an executable model for implementation, simulation and verification purposes. A completely automatic mapping of both the architectural aspects and data objects is shown, including real-time garbage collection. Process execution trees (PETs) are introduced to schedule real-time, concurrent processes. This paper explains the functioning of these self-modifying data structures based on the operational semantics of POOSL (Parallel Object-Oriented Specification Language). Process execution trees are generally applicable to other process algebras as well (e.g. CCS, CSP, ACP), and follow quite naturally from the inference rules of these algebras.

关键词： Software systems System-level design Object oriented modeling Algebra Pricing Application software Computer industry Real time systems Operating systems Positron emission tomography

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A pipelined reconfigurable architecture for visual-based navigation

A pipelined reconfigurable architecture for visual-based nav...

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EUROMICRO Conference

作者： J.A. Boluda F. Pardo F. Blasco J. Pelechano Departament dInformàtica Universitat de València Burjassot Spain Institut de Robòtica Universitat de València Paterna Spain

This paper is concerned with a pipelined reconfigurable architecture for implementing image processing algorithms useful for robotic navigation. The computational complexity and real-time application of these algorithms suggest a custom hardware approach, but the large quantity of different algorithms useful for different tasks suggest a software reconfigurable approach. A logic reconfigurable based architecture combines both properties: hardware speed and software flexibility. Moreover, the large quantity of data to be processed using conventional Cartesian image processing algorithms, combined with autonomous vehicle constraints (power consumption, size and weight) makes the use of reconfigurable existent machines impossible. The log-polar vision reduces the amount of data to be processed and simplifies the computation of several interesting algorithms, allowing a reconfigurable approach which is scalable, powerful and small enough for an autonomous robot.

关键词： Reconfigurable architectures Navigation Image processing Software algorithms Hardware Robots Computational complexity Application software Reconfigurable logic Computer architecture

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Multi-agent environment for software quality assurance, AUTOQ

Multi-agent environment for software quality assurance, AUTO...

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EUROMICRO Conference

作者： H.K.N. Leung C. Poon Department of Computing Hong Kong Polytechnic University Hong Kong China

Software quality assurance (SQA) is an essential process to ensure high quality products. With the maturing of the agent technology, SQA can take advantage of this new development. This paper presents a framework of a multi-agent environment (AUTOQ) that can aid software quality assurance. SQA activities that can be performed by agents have been identified. A scenario of how multi-site software development can use AUTOQ is presented. It is expected that the use of AUTOQ will improve the monitoring and controlling of SQA activities and eliminates most manual effort.

关键词： Software quality Design engineering Artificial intelligence US Department of Transportation Monitoring Software maintenance Radio access networks Quality control Automatic testing Automation

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An optimization of simulation time in the hardware accelerated VLSI simulator

An optimization of simulation time in the hardware accelerat...

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EUROMICRO Conference

作者： G. Kucharski W. Wrona P.T.K. Centertel Sp. z o.o. Katowice Poland Bielsko-Biała Branch Technical University of Łódz Poland

In this paper we present some aspects of time optimization in hardware accelerated simulator of VLSI integrated circuits. The acceleration of simulation is achieved thanks to special data format of driver, which is used at the most time consuming operations of a simulator, e.g. finding transaction with least delay time, active signal and driver updating etc.

关键词： Acceleration Very large scale integration Signal processing Field programmable gate arrays Circuit simulation Integrated circuit modeling Hardware design languages Signal resolution Electrical capacitance tomography Communication system control

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A tool for teaching and research on computer architecture and reconfigurable systems

A tool for teaching and research on computer architecture an...

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EUROMICRO Conference

作者： C. Teuscher J.-O. Haenni F.J. Gomez H.F. Restrepo E. Sanchez Logic Systems Laboratory Swiss Federal Institute of Technology Lausanne Switzerland Escuela Técnica Superior de Informática Universidad Autónoma de Madrid Madrid Spain

Labomat 3 is a reconfigurable platform for teaching and research purposes developed by our laboratory. In this paper we describe in details the hardware and software of the board as well as three application domains: logic design, computer architecture, and codesign. The main features of the board are: a microprocessor associated with two mid-range FPGAs; a set of powerful software tools going from a real-time operating system to a JavaVM; easy to use design and simulation tools, and last but not least a network interface. The combination of these features makes Labomat 3 a unique teaching tool. Nevertheless, the board may also be used for advanced research: several boards connected together can form a powerful reconfigurable parallel system.

关键词： Education Computer architecture Laboratories Hardware Application software Logic design Microprocessors Field programmable gate arrays Software tools Real time systems

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Computer know thy self!: a biological way to look at fault-tolerance

Computer know thy self!: a biological way to look at fault-t...

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EUROMICRO Conference

作者： A.M. Tyrell Dept. of Electron. York Univ. UK

The body's immune system is impressively good at coping with external and internal errors, usually known as bacteria and viruses. The body is able to distinguish the haemoglobin found in blood from the insulin secreted by the pancreas from the vitreous humor contained in the eye from everything else. It must manage to repel innumerable different kinds of invading organisms and yet not attack the body. The question to be answered is can we mimic these mechanisms in the design of our computer systems? This paper gives some details on how the body actually performs this amazing feat and gives some suggestions as to how this might inspire our design of computer systems increasing their reliability-immunotronics.

关键词： Biology computing Fault tolerance Immune system Organisms Bridges Nervous system Computer errors Blood Read only memory Pancreas

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Modeling n/spl times/n bit multiplication blocks for DSP applications using VHDL

Modeling n/spl times/n bit multiplication blocks for DSP app...

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EUROMICRO Conference

作者： S.B. Ors A. Dervisoglu Electrical and Electronics Engineering Electronics and Communication Engineering Departmentage Istanbul Technical University Istanbul Turkey

In this paper we propose two models of multiplication blocks by using VHDL. The algorithms that are used for writing the models are suitable for high speed multiplication and have regular cellular array structures. We have simplified some equations given in the references and then have written the VHDL model accordingly. Thus, a circuit synthesized by using the models proposed in this paper will have less area and gate count on the longest path than those given in the literature. We propose explicit expressions for calculating area values and the gate count on the longest path of the circuits for both of multiplication blocks for any value of n for, 2/spl les/n/spl les/54. Also we propose a method to determine the types of gates on the longest path of the circuit.

关键词： Digital signal processing Combinational circuits Delay Adders Digital signal processing chips Computational modeling Very large scale integration Wires

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