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100 Gb/s all-optical multifunctional AND, NOR, XOR, OR, XNOR, and NAND logic gates in a single compact scheme based on semiconductor optical amplifiers

100 ? Gb/s 所有光多功能并且也不, XOR, XNOR,和在一个单个协议的反及逻辑门或,基于半导体策划光放大器

作     者:Kotb, Amer Guo, Chunlei 

作者机构:Chinese Acad Sci Changchun Inst Opt Fine Mech & Phys GPL Photon Lab Changchun 130033 Peoples R China Univ Fayoum Fac Sci Dept Phys Al Fayyum 63514 Egypt Univ Rochester Inst Opt Rochester NY 14627 USA 

出 版 物:《OPTICS AND LASER TECHNOLOGY》 (光学与激光技术)

年 卷 期:2021年第137卷

页      面:106828-106828页

核心收录:

学科分类:070207[理学-光学] 07[理学] 08[工学] 0803[工学-光学工程] 0702[理学-物理学] 

基  金:Chinese Academy of Sciences President's International Fellowship Initiative [2019FYT0002] Talented Young Scientist Program China Science and Technology Exchange Center of the Ministry of Science and Technology of China 

主  题:Optical logic functions Semiconductor optical amplifiers Optical interferometers 

摘      要:Recently, the need for optical signal processing with high information capacity and low cost is rapidly increasing while Boolean functions handled by single-function logic gates are very limited and high cost. Therefore, we overcome the single-function limitation by investigating through means of theoretical analysis the performance of all-optical multifunctional six basic logic gates, AND, NOR, XOR, OR, XNOR, and NAND, for the first time using the nonlinearity properties of cross-phase modulation in a single compact scheme based on few semiconductor optical amplifiers (SOAs) at a data rate of 100 Gb/s acceptable. The AND and XOR logic gates are performed using SOAs-assisted Mach-Zehnder interferometers while the NOR logic gate is performed using a single SOA followed by a delayed interferometer. Then three additional logic gates, OR, XNOR, and NAND, are performed by the combination of the outcomes of the AND, XOR, and NOR logic gates. The performance of the considered functions is evaluated by three metrics, i.e. quality factor, extinction ratio, and contrast ratio. The achieved results confirm that six basic logic functions can be executed with acceptable performance using the proposed compact scheme at 100 Gb/s.

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