Brigantine: Bridging the Bottleneck of Swapping Architecture with Page Preloading

作     者：Wang, Lizhi Lin, Xue Liu, Ximing Gong, Xiaoli Zhang, Jin Wang, Wenwen Yew, Pen-Chung 

作者机构：College of Computer Science Nankai University Tianjin300350 China Department of Computer Science University of Georgia AthensGA30602-7404 United States Department of Computer Science and Engineering University of Minnesota at Twin Cities MinneapolisMN55455 United States Tianjin Key Laboratory of Brain Science and Intelligent Rehabilitation Tianjin China 

出 版 物：《SSRN》 

年 卷 期：2023年

核心收录：

主　　题：Memory architecture 

摘      要：Current hardware technologies, such as Intel SGX and RDMA, rely on swapping architectures to maintain compatibility with existing systems. However, the high bandwidth and low latency of these hardware designs shift the bottleneck of swappingfrom low-speed devices to physical transmission carriers and virtual conversion processes. Furthermore, the unavoidable worldswitch introduces significant overhead during page fault processing, leading to significant performance penalties, especially for memory-intensive applications with large memory footprints. Thus, it is crucial to explore optimization opportunities to improvethe efficiency of swapping architectures. In this paper, we propose two effective page preloading schemes, which we have implemented in a prototype with LLVM. Our experimental results on SPEC CPU2017 demonstrate that, on average, the two proposedmechanisms can achieve performance improvements of 16.9% and 11.7%, respectively, with a maximum improvement of 22.0%and 15.3%. Additionally, our combined approach can achieve an improvement of 9.8% on real-world applications such as SIFTand MSER. © 2023, The Authors. All rights reserved.