An Optimal Implementation on FPGA of a Hopfield Neural Network

作     者：W. Mansour R. Ayoubi H. Ziade R. Velazco W. EL Falou 

作者机构：TIMA Laboratory 46 avenue Félix Viallet 38031 Grenoble Francetima.imag.fr Department of Computer Engineering University of Balamand Tripoli Lebanonbalamand.edu.lb Electrical and Electronics Department Faculty of Engineering I Lebanese University El Arz Street El Kobbe Tripoli Lebanonul.edu.lb Lebanese French University of Technology and Applied Sciences Tripoli Lebanon 

出 版 物：《Advances in Artificial Neural Systems》 

年 卷 期：2011年第2011卷第1期

学科分类：08[工学] 0812[工学-计算机科学与技术（可授工学、理学学位）] 

摘      要：The associative Hopfield memory is a form of recurrent Artificial Neural Network (ANN) that can be used in applications such as pattern recognition, noise removal, information retrieval, and combinatorial optimization problems. This paper presents the implementation of the Hopfield Neural Network (HNN) parallel architecture on a SRAM-based FPGA. The main advantage of the proposed implementation is its high performance and cost effectiveness: it requires O ( 1 ) multiplications and O (log N ) additions, whereas most others require O ( N ) multiplications and O ( N ) additions.