An Electrical-Thermal Co-Simulation Model of Chiplet Heterogeneous Integration Systems

作     者：Ma, Xiaoning Xu, Qinzhi Wang, Chenghan Cao, He Liu, Jianyun Zhang, Daoqing Li, Zhiqiang 

作者机构：Chinese Acad Sci Inst Microelect Beijing 100045 Peoples R China Chinese Acad Sci Key Lab Fabricat Technol Integrated Circuits Beijing 100045 Peoples R China Univ Chinese Acad Sci Sch Integrated Circuits Beijing 101408 Peoples R China Beijing Key Lab Three Dimens & Nanometer Circuit D Beijing 100029 Peoples R China 

出 版 物：《IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS》 (IEEE Trans Very Large Scale Integr VLSI Syst)

年 卷 期：2024年第32卷第10期

页      面：1769-1781页

核心收录：

学科分类：0808[工学-电气工程] 08[工学] 0812[工学-计算机科学与技术（可授工学、理学学位）] 

基　　金：National Natural Science Foundation of China Strategic Priority Research Program (A) of Chinese Academy of Sciences (CAS) [XDA0330401] CAS Youth Interdisciplinary Team [JCTD-2022-07] 

主　　题：Chiplet heterogeneous integration (CHI) system electrical-thermal co-simulation equivalent electrical conductivity finite volume method (FVM) 

摘      要：Chiplet heterogeneous integration (CHI) is one of the important technology choices to continue Moore s law. However, due to the characteristics of high power and low supply voltage in CHI systems, heavy currents need to flow through the power delivery network (PDN), and the Joule heating effect will result in the overall temperature increase of the CHI system. Meanwhile, the high temperature will cause the current as well as the performance of the system to degrade and a series of reliability problems will occur. In this article, an effective electrical-thermal coupling model is proposed to predict the steady-state temperature distribution of a 2.5-D CHI system considering the Joule heating effect and the temperature effect on the IR drop. The equivalent electrical conductivity model is also built up to describe the design features of the redistribution layer (RDL), bump, and through silicon via (TSV) structures based on the electrical-thermal duality. Furthermore, the governing equations for voltage distribution and temperature distribution are solved simultaneously by utilizing the finite volume method (FVM) with nonuniform mesh to realize the electrical-thermal co-simulation of the multiscale CHI system. The model application is further performed to investigate the influence of the model parameters on the voltage drop and temperature distribution of the CHI system. The verified systems and simulated results of the present investigation demonstrate the viability and accuracy of voltage and temperature field co-simulation and indicate that the new proposed electrical-thermal model is helpful in thermal and voltage drop analysis of packaging structures with the Joule heating effect and can be adopted to assist in the physical design optimization of 2.5-D CHI or 3-D heterogeneous stacked chips.