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IEEE OPEN JOURNAL OF INSTRUMENTATION AND MEASUREMENT

Ultrahigh-Performance Radio Frequency System-on-Chip Implementation of a Kalman Filter-Based High-Precision Time and Frequency Synchronization for Networked Integrated Sensing and Communication Systems

作     者:Ghasemi, Roghayeh Fenske, Patrick Koegel, Tobias Hehn, Markus Ullmann, Ingrid Vossiek, Martin 

作者机构:Friedrich Alexander Univ Erlangen Nurnberg Inst Microwaves & Photon D-91058 Erlangen Germany 

出 版 物:《IEEE OPEN JOURNAL OF INSTRUMENTATION AND MEASUREMENT》 (IEEE. Open. J. Instrum. Meas.)

年 卷 期:2025年第4卷

核心收录:

基  金:German Research Foundation (DFG) [GRK 2680, 437847244] German Federal Ministry of Education and Research (BMBF) [16KISK044] 

主  题:Synchronization Clocks Time-frequency analysis Frequency synchronization Kalman filters Sensors Protocols Frequency estimation Wireless sensor networks Real-time systems Field-programmable gate array (FPGA) Kalman filter for time offset and frequency skew estimation precision time protocol (PTP) time and frequency synchronization wireless sensor network (WSN) synchronization 

摘      要:The integration of radar sensing and imaging capabilities into future integrated sensing and communication (ISAC) networks enables advanced use cases, including autonomous vehicle navigation, real-time health monitoring, and smart city management. However, ultraprecise time and frequency synchronization is crucial for unlocking the full potential of such networked ISAC systems. In this article, a novel real-time wireless time and frequency synchronization scheme is developed and fully implemented on a high-end radio frequency system-on-chip field-programmable gate array (FPGA) platform. The excellent performance and robustness of the proposed solution in practical applications are demonstrated. It is evidenced that the recursive nature of the Kalman filter is well suited to the dynamic capabilities of FPGA-based simultaneous synchronization. Observed values obtained through the precision time protocol (PTP) are iteratively refined, thus effectively compensating for uncertainties encountered during a synchronization packet exchange. Due to the deterministic processing time inherent in the FPGA, the proposed synchronization method achieves exceptional precision, with clock offset deviations in the nanosecond range and clock rate deviations limited to only a few parts per billion, even across considerable distances between the network nodes.

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