Insight Into Gate-Induced Drain Leakage in Silicon Nanowire Transistors

作     者：Fan, Jiewen Li, Ming Xu, Xiaoyan Yang, Yuancheng Xuan, Haoran Huang, Ru 

作者机构：Peking Univ Inst Microelect Key Lab Microelect Devices & Circuits Beijing 100871 Peoples R China 

出 版 物：《IEEE TRANSACTIONS ON ELECTRON DEVICES》 (IEEE Trans. Electron Devices)

年 卷 期：2015年第62卷第1期

页      面：213-219页

核心收录：

学科分类：0808[工学-电气工程] 08[工学] 0702[理学-物理学] 

基　　金：973 Projects [2011CBA00601] National Natural Science Foundation of China [61106085, 61421005, 60625403] National Science and Technology Major Project [2009ZX02035-001] 

主　　题：Band-to-band tunneling (BTBT) CMOS technology gate-induced drain leakage (GIDL) power consumption silicon nanowire transistors (SNWTs) 

摘      要：In this paper, detailed physical mechanisms of gate-induced drain leakage (GIDL) in gate-all-around silicon nanowire transistors (SNWTs) are investigated and verified by experiments and TCAD studies. The results show that the SNWTs will suffer from a more severe GIDL issue in small diameter (D-nw) devices under low vertical bar V-gs vertical bar. It is believed that this unexpected GIDL problem in SNWTs origins from the longitudinal band-to-band tunneling (L-BTBT) at the body/drain junction enhanced by the strong gate coupling to the depletion region, which usually can be neglected in planar devices. On the other hand, the traditional transverse BTBT (T-BTBT) only dominates at high vertical bar V-gs vertical bar with relatively large D-nw. Systematic study of GIDL dependence on process parameters, including D-nw cross-sectional shape, doping, and overlap length (L-ov), shows that both T-BTBT and L-BTBT can be alleviated by reducing the doping and rounding the corner, but L-BTBT is worsened by reducing D-nw and L-ov despite of the alleviated T-BTBT. As the extension process engineering strongly impacts the short-channel effect and driving current of SNWTs, a GIDL optimization strategy considering the leakage power and device performance is given for low-power SNWT design.