MLXR: multi-layer obstacle-avoiding X-architecture Steiner tree construction for VLSI routing

作     者：Xing HUANG Wenzhong GUO Genggeng LIU Guolong CHEN 

作者机构：College of Mathematics and Computer Sciences Fuzhou University Key Laboratory of Network Computing and Intelligent Information Processing (Fujian Province)Fuzhou University 

出 版 物：《Science China(Information Sciences)》 (中国科学:信息科学(英文版))

年 卷 期：2017年第60卷第1期

页      面：211-213页

核心收录：

学科分类：080903[工学-微电子学与固体电子学] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 

基　　金：supported in part by National Basic Research Program of China (Grant No. 2011CB808000) National Natural Science Foundation of China (Grants Nos. 11271002, 11501114) Fujian Natural Science Funds for Distinguished Young Scholar (Grant No. 2014J06017) Program for New Century Excellent Talents in Fujian Province (Grant No. JA13021) 

主　　题：VLSI MLXR multi-layer obstacle-avoiding X-architecture Steiner tree construction for VLSI routing tree 

摘      要：Dear editor,Rectilinear Steiner minimal tree(RSMT)has been widely used in several modern very large scale integration(VLSI)circuit design *** of its importance,it has been fully studied in the past *** addition,the density of modern VLSI chips has increased *** today’s VLSI designs,there are increasingly more obstacles,such as IP blocks and pre-routed nets,these