SET Pulse-Width Measurement Suppressing Pulse-Width Modulation and Within-Die Process Variation Effects

作     者：Harada, Ryo Mitsuyama, Yukio Hashimoto, Masanori Onoye, Takao 

作者机构：Osaka Univ Dept Informat Syst Engn Suita Osaka 5650871 Japan JST CREST Tokyo 1020075 Japan Kochi Univ Technol Sch Syst Engn Kami 7828502 Japan 

出 版 物：《IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES》 (电子信息通信学会汇刊：电子学、通信及计算机科学基础)

年 卷 期：2014年第E97A卷第7期

页      面：1461-1467页

核心收录：

学科分类：0808[工学-电气工程] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 0812[工学-计算机科学与技术（可授工学、理学学位）] 

主　　题：soft error single event transient (SET) pulse-width pulse-width modulation measurement circuit within-die process variation 

摘      要：This paper presents a measurement circuit structure for capturing SET pulse-width suppressing pulse-width modulation and within-die process variation effects. For mitigating pulse-width modulation while maintaining area efficiency, the proposed circuit uses massively parallelized short inverter chains as a target circuit. Moreover, for each inverter chain on each die, pulse-width calibration is performed. In measurements, narrow SET pulses ranging 5 ps to 215 Ps were obtained. We confirm that an overestimation of pulse-width may happen when ignoring die-to-die and within-die variation of the measurement circuit. Our evaluation results thus point out that calibration for within-die variation in addition to die-to-die variation of the measurement circuit is indispensable.