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内蒙古自治区呼和浩特市赛罕区大学西街235号 邮编: 010021
作者机构:Univ S Florida Dept Comp Sci & Engn Tampa FL 33620 USA Tessera Inc Syst Engn San Jose CA 95134 USA Texas A&M Dept Comp Sci College Stn TX 77843 USA Univ S Florida Ctr Robot Assisted Search & Rescue Tampa FL 33620 USA
出 版 物:《IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS》 (IEEE Trans Very Large Scale Integr VLSI Syst)
年 卷 期:2010年第18卷第1期
页 面:29-38页
核心收录:
学科分类:0808[工学-电气工程] 08[工学] 0812[工学-计算机科学与技术(可授工学、理学学位)]
基 金:Tessera, Inc. through the Safety Security Rescue Research Center NSF Industry/University Cooperative Research Center [EIA-044392]
主 题:Field-programmable gate array (FPGA) implementation Lucas-Kanade algorithm optical flow VLSI architecture
摘 要:Optical flow computation in vision-based systems demands substantial computational power and storage area. Hence, to enable real-time processing at high resolution, the design of application-specific system for optic flow becomes essential. In this paper, we propose an efficient VLSI architecture for the accurate computation of the Lucas-Kanade (L-K)-based optical flow. The L-K algorithm is first converted to a scaled fixed-point version, with optimal bit widths, for improving the feasibility of high-speed hardware implementation without much loss in accuracy. The algorithm is mapped onto an efficient VLSI architecture and the data flow exploits the principles of pipelining and parallelism. The optical flow estimation involves several tasks such as Gaussian smoothing, gradient computation, least square matrix calculation, and velocity estimation, which are processed in a pipelined fashion. The proposed architecture was simulated and verified by synthesizing onto a Xilinx Field Programmable Gate Array, which utilize less than 40% of system resources while operating at a frequency of 55 MHz. Experimental results on benchmark sequences indicate 42% improvement in accuracy and a speed up of five times, compared to a recent hardware implementation of the L-K algorithm.