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作者机构:Univ N Texas Dept Comp Sci & Engn Denton TX 76203 USA Univ Cent Florida Sch Elect Engn & Comp Sci Orlando FL 32816 USA Arizona State Univ Dept Comp Sci & Engn Tempe AZ 85287 USA
出 版 物:《JOURNAL OF SYSTEMS ARCHITECTURE》 (系统结构杂志)
年 卷 期:2008年第54卷第12期
页 面:1077-1088页
核心收录:
学科分类:08[工学] 0835[工学-软件工程] 0812[工学-计算机科学与技术(可授工学、理学学位)]
基 金:Arizona State University Embedded System Consortium (CES) [AQS0005]
主 题:Field programmable gate array Elliptic curve cryptography Tate pairing Parallel processing Galois field arithmetic
摘 要:Elliptic curve cryptography (ECC) and Tate pairing are two new types of public-key cryptographic schemes that become popular in recent years. ECC offers a smaller key size compared to traditional methods without sacrificing Security level. Tate pairing is a bilinear map commonly used in identity-based cryptographic schemes. Therefore, it is more attractive to implement these schemes by using hardware than by using software because of its computational expensiveness. In this paper, we propose field programmable gate array (FPGA) implementations of the elliptic curve point Multiplication in Galois field GF(2(283)) and Tate pairing computation in GF(2(283)). Experimental results demonstrate that, compared with previously proposed approaches, Our FPGA implementations of ECC and Tate pairing can speed up by 31.6 times and 152 times, respectively. (c) 2008 Elsevier B.V. All rights reserved.