A new method for designing multiplierless two-channel filterbank using shifted-Chebyshev polynomials

作     者：Kumar, Anil Sharma, Ila 

作者机构：PDPM Indian Inst Informat Technol Design & Mfg Dept Elect & Commun Jabalpur India 

出 版 物：《INTERNATIONAL JOURNAL OF ELECTRONICS》 (国际电子学杂志)

年 卷 期：2019年第106卷第4期

页      面：537-552页

核心收录：

学科分类：0808[工学-电气工程] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 

基　　金：Department of Science and Technology [SB/S3IEECE/0249/2016] 

主　　题：Filterbank swarm algorithms shifted-Chebyshev polynomial canonic sign digit sub-expression elimination 

摘      要：This paper presents an efficient design method for a digital multiplierless two-channel filterbank using the shifted-Chebyshev polynomials and common sub-expression elimination (CSE) algorithm for reducing hardware requirements such as adders and multipliers. For designing a two-channel filterbank, the design problem is constructed as minimization of integral meansquare error between the desired and designed response of a prototype filter in the passband and stopband. For controlling the performance in passband and stopband, two parameters (K-P, and K-S) are used, whose optimum values are determined by swam optimization techniques such as differential evolution algorithm, artificial bee colony optimization, particle swarm optimizations, cuckoo search algorithm and hybrid method using a fitness function, constructed by perfect reconstruction condition of a filterbank. The number of polynomials used for approximation depends upon the order of a prototype filter. A new hybrid CSE is proposed for further reduction of hardware requirement. A comparative study of various CSE techniques such as horizontal, vertical and proposed hybrid CSE is also made. Numerical examples illustrate the effectiveness of the proposed algorithm in the reduction of adders with comparisons accomplished using existing methods. It has been found that almost 43% adder gain can be achieved when a filter is designed with N =32 and wordlength (WL) as 12 using proposed methodology.