SIMULATIONS OF FIELD-PLATED AND RECESSED GATE GALLIUM NITRIDE-BASED HETEROJUNCTION FIELD-EFFECT TRANSISTORS

作     者：Valentin O. Turin Michael S. Shur Dmitry B. Veksler 

作者机构：Department of Electrical Computer and Systems Engineering Rensselaer Polytechnic Institute Troy New York 12180 USA Department of Physics Applied Physics and Astronomy Rensselaer Polytechnic Institute Troy New York 12180 USA 

出 版 物：《International Journal of High Speed Electronics and Systems》 

年 卷 期：2007年第17卷第1期

页      面：19-23页

学科分类：0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 

主　　题：Gallium Nitride heterojunction field-effect transistor cutoff frequency 

摘      要：We report on two-dimensional isothermal simulations of recessed gate and field-plated AlGaN - GaN HFETs with submicron gates. The optimization of the recessed gate shape allows us to reduce the electric field at the drain-side gate edge by approximately 30%. Our simulations reveal a dramatic increase of the effective gate length with increasing drain-to-source bias with a commensurate decrease of the cutoff frequency (up to 40% decrease for 50V). To improve the cutoff frequency for the high drain-to-source bias, we suggest using the second field plate connected to the drain with a small gap between the two field plates. In this design, the electric field in the gap between the gate and the drain field plate is higher leading to a significant reduction of the effective gate length and, as a consequence, to an increase in the cutoff frequency at high drain-to-source biases (compared to the conventional design).