Computer architecture visualisation techniques

作     者：Ibbett, RN 

作者机构：Univ Edinburgh Inst Comp Syst Architecture Div Informat Edinburgh EH9 3JZ Midlothian Scotland 

出 版 物：《MICROPROCESSORS AND MICROSYSTEMS》 (微处理机与微型系统)

年 卷 期：1999年第23卷第5期

页      面：291-300页

核心收录：

学科分类：0808[工学-电气工程] 08[工学] 0812[工学-计算机科学与技术（可授工学、理学学位）] 

基　　金：Engineering and Physical Sciences Research Council  EPSRC  (GR/J43295  GR/K19716) 

主　　题：computer architecture simulation visualisation 

摘      要：Visualisation of the activities that occur within a processor is an important aspect of computer architecture education. Various systems have been developed for this purpose, mostly based on specific processor architectures. At the University of Edinburgh two (closely related) simulation systems, HASE and Simjava, have been developed, both of which offer a variety of visualisation facilities. HASE is a general purpose simulation environment designed to support both research and teaching in computer architecture. Simjava is a Java implementation of HASE, which allows live simulations to be incorporated into WWW pages and run remotely. It has been used to embed active diagrams into an Integrated Learning Support Environment for Computer Architecture. (C) 1999 Elsevier Science B.V. All rights reserved.