A 600-MHz superscalar floating-point processor

作     者：Clouser, J Matson, M Badeau, R Dupcak, R Samudrala, S Allmon, R Fairbanks, N 

作者机构：Compaq Comp Corp Shrewsbury MA 01545 USA 

出 版 物：《IEEE JOURNAL OF SOLID-STATE CIRCUITS》 (IEEE J Solid State Circuits)

年 卷 期：1999年第34卷第7期

页      面：1026-1029页

核心收录：

学科分类：0808[工学-电气工程] 08[工学] 

主　　题：CMOS digital integrated circuits floating point arithmetic microprocessor chips pipeline arithmetic reduced instruction set computing 0.35 micron 2.2 V 59 SpecFP95 600 MHz 9.6 GB/s CMOS process RISC Alpha microprocessor add/subtract operations independen floating point arithmetic Microprocessor chips Reduced instruction set computers CMOS process pipeline arithmetic CMOS digital integrated circuits 

摘      要：The floating-point unit of a 600-MHz, out-of-order, superscalar RISC Alpha microprocessor is described. The unit achieves 59 SpecFP95 and can transfer register data at up to 9.6 GB/s, It has two independent pipelines for multiply and add/subtract operations, with iterative divide and square-root circuits, and is fabricated in a 2.2-V, 0.35-mu m CMOS process.