Hardware/software partitioning of embedded systems with multiple hardware processes

作     者：Hendry, DC Sananikone, DS 

作者机构：Univ Aberdeen Dept Engn Aberdeen AB9 2UE Scotland 

出 版 物：《IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES》 (IEE Proc Comput Digital Tech)

年 卷 期：1997年第144卷第5期

页      面：285-294页

核心收录：

学科分类：0808[工学-电气工程] 08[工学] 0812[工学-计算机科学与技术（可授工学、理学学位）] 

主　　题：embedded systems hardware/software partitioning electronic design automation 

摘      要：COSYN is an hardware/software partitioning tool for embedded systems with multiple hardware processes. It produces a system hardware/software partition whilst satisfying system constraints, where feasible. COSYN uses a CIPN (coloured interpreted Petri net) to model systems, and to provide simulation data for the partitioning algorithm. The CIPN provides modelling capability for multiple processes and interprocess communication primitives. The partitioning algorithm, which adopts a fine-grained approach to system partitioning (it considers moving nodes at the basic block level), is based on selecting blocks based on their potential speedup and extra hardware requirements, using hardware and software execution time estimators. The interdependence between interprocess communication primitives is exploited to achieve a better hardware/software partition. Results for an input example pdi using different partitioning algorithms are given which illustrate the benefits of the approach presented in this paper.