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作者机构:ARGONNE NATL LAB DIV MATH & COMP SCI ARGONNE IL 60439 USA
出 版 物:《PARALLEL COMPUTING》 (Parallel Comput)
年 卷 期:1997年第22卷第11期
页 面:1513-1526页
核心收录:
学科分类:08[工学] 0812[工学-计算机科学与技术(可授工学、理学学位)]
基 金:Office of Computational and Technology Research U.S. Department of Energy, USDOE, (W-31-109-Eng-38)
主 题:Message-Passing Interface shared-memory multiprocessor NEC SX-4 MPICH performance implementation
摘 要:In this article we recount the sequence of steps by which MPICH, a high-performance, portable implementation of the Message-Passing Interface (MPI) standard, was ported to the NEC SX-4, a high-performance parallel supercomputer. Each step in the sequence raised issues that are important for shared-memory programming in general and shed light on both MPICH and the SX-4. The result is a low-latency, very high bandwidth implementation of MPI for the NEC SX-4, In the process, MPICH was also improved in several general ways.