A parallel FFT-accelerated layered-medium integral-equation solver for electronic packages

作     者：Liu, Chang Aygun, Kemal Yilmaz, Ali E. 

作者机构：Univ Texas Austin Dept Elect & Comp Engn Austin TX 78712 USA Intel Corp Chandler AZ 85226 USA 

出 版 物：《INTERNATIONAL JOURNAL OF NUMERICAL MODELLING-ELECTRONIC NETWORKS DEVICES AND FIELDS》 (国际数字模拟杂志：电路网络、器件与电磁场)

年 卷 期：2020年第33卷第2期

核心收录：

学科分类：0808[工学-电气工程] 08[工学] 0701[理学-数学] 

基　　金：Intel Corporation Texas Advanced Computing Center (TACC) 

主　　题：FFT electronic packages layered medium method of moments (MoM) parallel algorithms 

摘      要：A parallel iterative layered-medium integral-equation solver is presented for fast and scalable network parameter extraction of electronic packages. The solver, which relies on a 2-D fast Fourier transform (FFT)-based algorithm and a sparse preconditioner to reduce computational complexity, is parallelized using three workload decomposition strategies, including a pencil decomposition that increases the scalability of the computationally dominant FFT-based multiplication stage. A set of increasingly difficult benchmark problems, which require network parameter computations for N-trace = 1 to 257 package-scale interconnects, are solved on a petaflop scale computer to quantify the solver s accuracy, efficiency, and scalability. The total serialized computation time is observed to scale asymptotically as Ntrace2.6logNtrace. For the largest problem, using similar to 1.14 million unknowns and 1536 processes, the solver requires a wall-clock time of similar to 0.05 s per iteration, similar to 1 minute per excitation, similar to 9 h per frequency, and similar to 424 hours to extract the 514-port network parameters at 40 sample frequencies between 1 to 40 GHz.