Algorithm-Switching-Based Last-Level Cache Structure with Hybrid Main Memory Architecture

作     者：Li, Xian-Shu Yoon, Su-Kyung Kim, Jeong-Geun Burgstaller, Bernd Kim, Shin-Dug 

作者机构：Yonsei Univ Dept Comp Sci Seoul South Korea 

出 版 物：《COMPUTER JOURNAL》 (计算机杂志)

年 卷 期：2020年第63卷第1期

页      面：123-136页

核心收录：

学科分类：08[工学] 0835[工学-软件工程] 0812[工学-计算机科学与技术（可授工学、理学学位）] 

基　　金：Next-Generation Information Computing Development Program through the National Research Foundation of Korea (NRF) - Ministry of Science, ICT & Future Planning [NRF-2015M3C4A7065522] Samsung Electronics Yonsei University 

主　　题：last-level cache management clustering algorithm DRAM-NAND flash hybrid main memory 

摘      要：In this research, we designed an algorithm-switching (AS)-based last-level cache (LLC) structure with DRAM-NAND Flash hybrid main memory architecture. In order to take full advantage of previous memory access patterns and achieve high performance in the upper level of memory hierarchy, an AS-based clustering engine that uses k-means, k-medoids and k-center clustering algorithms was applied to LLC. The proposed LLC consists of three major parts, namely a set-divisible cache, and victim and clustering buffers. The victim and clustering buffers efficiently managed the history of cache blocks evicted from the set-divisible cache through the AS-based engine mechanism. The experimental results that were evaluated using Redis application and YCSB benchmark show that compared with conventional LLC structure, the proposed AS-based LLC structure could reduce the total execution time by 19.50%, power consumption by 16.31%, and NAND-Flash memory write count by 8.6%.