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作者机构:Swiss Fed Inst Technol Distributed Comp Grp Zurich Switzerland Swiss Fed Inst Technol Informat Technol & Elect Engn Dept Zurich Switzerland
出 版 物:《JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING》 (并行与分布式计算杂志)
年 卷 期:2020年第145卷
页 面:176-187页
核心收录:
学科分类:08[工学] 0812[工学-计算机科学与技术(可授工学、理学学位)]
主 题:Wait-free synchronization Compare-and-swap Consensus numbers Half-max Max-write
摘 要:Herlihy showed that multiprocessors must support advanced atomic objects, such as compare and-swap, to be able to solve any arbitrary synchronization task among any number of processes (Herlihy, 1991). Elementary objects such as read-write registers and fetch-and-add are fundamentally limited to at most two processes with respect to solving an arbitrary synchronization task. Later, it was also shown that simulating an advanced atomic object using elementary objects is impossible. However, Ellen et al. observed that the above impossibility assumes computation by synchronization objects instead of synchronization instructions applied on memory locations, which is how the actual multiprocessors compute (Ellen et al., 2016). Building on that observation, we show that two elementary instructions, such as max-write and half-max, can be much better than the advanced compare-and-swap instruction. Concretely, we show the following. 1. Half-max and max-write instructions are elementary, i.e., have consensus number one. 2. Half-max and max-write instructions can simulate compare-and-swap instruction in O(1) steps. 3. For a pipelined butterfly interconnect, concurrent throughput of half-max and max-write instructions exceeds the concurrent throughput of compare-and-swap by a factor n - the number of processes. 4. The family of instructions max-write-or-circle dot are also elementary, where circle dot is a commutative and an associative operation. 5. It takes Omega(log n) steps to simulate max-write-or-add using compare-and-swap but O(1) steps to simulate compare-and-swap using max-write-or-add and half-max. (C) 2020 Elsevier Inc. All rights reserved.