An Analytical Model for Distributed Capacitance in Up-Down Series Stacked Inductors

作     者：Tayenjam, Sobhana Vanukuru, Venkata Sundaram, Kumaravel 

作者机构：Vellore Inst Technol Sch Elect Engn SENSE Dept Micro & Nanoelect Vellore 632014 Tamil Nadu India GLOBALFOUNDRIES Bengaluru 560045 India 

出 版 物：《IEEE TRANSACTIONS ON ELECTRON DEVICES》 (IEEE电子器件汇刊)

年 卷 期：2020年第67卷第9期

页      面：3510-3515页

核心收录：

学科分类：0808[工学-电气工程] 08[工学] 0702[理学-物理学] 

基　　金：Council of Scientific and Industrial Research (CSIR)  New Delhi [09/844(0092)/2019-EMR.I] 

主　　题：Distributed capacitance self-resonant frequency (SRF) up-down series stacked inductors (UDSSIs) 

摘      要：Up-down series stacked inductors (UDSSIs) are known to have higher self-resonant frequency (SRF) when compared to standard series stacked inductors (SSSIs). In this article, a physics-based distributed capacitance model is presented to accurately estimate the inter-layer parasitic capacitance in both these configurations. Based on our analytical formulations, it is revealed that the total capacitance reduces substantially with increasing spiral turns in UDSSI, which is in turn responsible for increased SRF and inductor figure of merit (FOM). The importance of substrate resistivity and interlayer dielectric thickness in further improved inductor FOM with UDSSI configuration is also demonstrated. Prototype inductors using SSSI and UDSSI configurations are fabricated in 0.35-mu m BiCMOS technology. The measured results showed a 70% improvement in SRF with UDSSI structure while achieving inductance, quality factor, and FOM values of 31.54 nH, 12.34, and 4.4, respectively.