咨询与建议

看过本文的还看了

相关文献

该作者的其他文献

文献详情 >Design of multiple-valued prog... 收藏
Design of multiple-valued programmable logic arrays

Design of multiple-valued programmable logic arrays

作     者:Yong Ha Ko 

作者单位:NAVAL POSTGRADUATE SCHOOL 

学位级别:硕士

导师姓名:Jon T. Butler

授予年度:1988年

主      题:Multiple-Valued Logic Function Programmable Logic Array Circuit Generation Simulation 

摘      要:The goal of this thesis is the development of a programmable logic array (PLA) that accepts multiple-valued inputs and produces multiple valued outputs. The PLA is implemented in CMOS and multiple levels are encoded as current. It is programmed by choosing transistor geometries which control the current level at which the PLA reacts to inputs. An example of a 4-valued PLA is shown. As part of this research, a C program was written that produces a PLA layout.

读者评论 与其他读者分享你的观点

用户名:未登录
我的评分