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检索条件"任意字段=10th International Conference on Algorithms and Architectures for Parallel Processing"

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Enhancing I/O scheduler performance by exploiting internal parallelism of SSDs 15th

Enhancing I/O scheduler performance by exploiting internal p...

引用

15th international conference on algorithms and architectures for parallel processing, ICA3PP 2015

作者： Guo, Jiayang Hu, Yimin Mao, Bo School of Electrical and Computer Engineering University of Cincinnati Cincinnati United States Software School of Xiamen University Xiamen China

ISBN: (纸本)9783319271392

this paper presents an SSD-based Block I/O Scheduler, short for SBIOS. SBIOS fully exploits the internal parallelism to improve the system performance. It dispatches the read requests to different blocks to make full use of SSD internal parallelism. For write requests, it tries to dispatch write requests to the same block to alleviate the block cross penalty and garbage collection overhead. Moreover, SBIOS introduces the conception of batch processing and separates read and write requests to avoid read write interference. the evaluation results show that compared with other I/O schedulers in the Linux kernel, SBIOS reduces the average response time significantly. Consequently, the performance of the SSD-based storage systems is improved. © 2015 Springer international Publishing Switzerland.

关键词： Batch data processing

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Proceedings of the 2015 IEEE international conference on Networking, Architecture and Storage, NAS 2015

Proceedings of the 2015 IEEE International Conference on Net...

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10th IEEE international conference on Networking, Architecture and Storage, NAS 2015

ISBN: (纸本)9781467378918

the proceedings contain 50 papers. the topics discussed include: FINGER: a novel erasure coding scheme using fine granularity blocks to improve Hadoop write and update performance;a virtual shared metadata storage for HDFS;a time-efficient connected densest subgraph discovery algorithm for big data;caching on dual-mode flash memory;cost-effectively improving life endurance of MLC NAND Flash SSDs via hierarchical data redundancy and heterogeneous flash memory;adaptive video streaming uploading with moving prediction in VANETs scenarios;direct device-to-device transfer protocol: a new look at the benefits of a decentralized I/O model;a regional popularity-aware cache replacement algorithm to improve the performance and lifetime of SSD-based disk cache;and a novel optimization algorithm for Chien Search of BCH codes in NAND flash memory devices.

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PNSICC: A novel parallel network security inspection mechanism based on cloud computing 15th

PNSICC: A novel parallel network security inspection mechani...

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15th international conference on algorithms and architectures for parallel processing, ICA3PP 2015

作者： He, Jin Dong, Mianxiong Ota, Kaoru Fan, Minyu Wang, Guangwei Department of Computer Science University of Electronic Science and Technology of China Chengdu611731 China Department of Information and Electronic Engineering Muroran Institute of Technology Muroran Japan

ISBN: (纸本)9783319271392

As we all know, application firewall provides in-depth inspection to ensure application-layer security services, but brings a serious decline for network performance of application service, even more serious impact on service usability, worse, in the face of increasingly complex and diverse network application services that require an integrated network security protection, different types of application firewall collaborate together to ensure security use of integrated services, but multiple application firewalls lead to more serious performance problems than a single one. Recent efforts have provided a large number of optimization measures and algorithms, what is more, have offered a lot of new security architecture for application firewalls, unfortunately, most of them did not achieve the desired results. We have proposed a novel architecture that combines the characteristics of cloud computing, namely, parallel network security inspection Mechanism based on cloud computing (PNSICC) that is able to addresses performance problems for multiple intertwined application firewalls that protect network security of integrated service. PNSICC not only provides effective network security protections for the protected objects, but also has greatly improved security inspection efficiency. We have proved by experiments that our scheme is an effective and efficient method. © Springer international Publishing Switzerland 2015.

关键词： Cloud computing

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Performance Increase by Software Decomposition with Characteristics of Combinational Logic

Performance Increase by Software Decomposition with Characte...

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international conference on P2P, parallel, Grid, Cloud and Internet Computing (3PGCIC)

作者： Nils Potthoff Carsten Gremzow Christoph Brandau Dietmar Tutsch Faculty E - Electrical Information and Media Engineering University of Wuppertal Wuppertal Germany

Software development for multicore or multiprocessor systems is complex and error prone. the development of sequential source code is familiar and a proven procedure. the model presented in this paper can help to make use of current hardware architectures with existing software. this model makes a change in execution possible and could lead to hardware software co-design. this paper presents a way to decompose sequential software. the characteristics are used for new arrangements of the fragments and in software visualization. the visualization supports the developers in understanding internal dependencies. Some improvements in visual presentation by reducing complexity are discussed.

关键词： Software Hardware Programming Multicore processing Visualization Complexity theory

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A GPU Algorithm in a Distributed Computing System for 3D MRI Denoising

A GPU Algorithm in a Distributed Computing System for 3D MRI...

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international conference on P2P, parallel, Grid, Cloud and Internet Computing (3PGCIC)

作者： Salvatore Cuomo Ardelio Galletti Livia Marcellino University of Naples Federico II Italy University of Naples Parthenope Italy

ISBN: (纸本)9781467394741

An interesting challenge in E-health is to perform real-time diagnosis. In many distributed computing systems the data processing stage, generally assigned on standard computational CPU environments, is a critical aspect. In particular, the analysis of magnetic resonance imaging (MRI) for improving the quality of images and helping the diagnosis requires an high computational complexity. Using Graphics processing Units (GPUs) on High Performance Computing (HPC), the images processing step can be accelerated by speeding the whole diagnosis procedure. In this paper, we propose a parallel algorithm, on a GPU environment, for MRI denoising in order to make the diagnostic system more efficient. As case study, we consider the Optimized Blockwise Non Local Means (OB-NLM) method. Its intrinsic nature makes it perfectly suited for parallelization and multithreading implementation, especially for GPUs architectures. the results show a significant improvement of the entire healthcare practice procedure in terms of performances.

关键词： Graphics processing units Instruction sets Magnetic resonance imaging Kernel three-dimensional displays Image restoration Standards

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A Distributed Ensemble Scheme for Nonlinear Support Vector Machine 10

A Distributed Ensemble Scheme for Nonlinear Support Vector M...

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IEEE 10th international conference on Intelligent Sensors Sensor Networks & Information Proc (IISSNIP)

作者： Lai, Wei-Chih Huang, Po-Han Lee, Yuh-Jye Chiang, Alvin Natl Taiwan Univ Sci & Technol Taipei Taiwan

ISBN: (纸本)9781479980550

We propose an ensemble scheme with a parallel computational structure which we call Distributed Ensemble Support Vector Machine (DESVM) to overcome the difficulties of large scale nonlinear Support Vector Machines (SVMs) in practice. the dataset is split into many stratified partitions. Each partition might be still too large to be solved by using conventional SVM solvers. We apply the reduced kernel trick to generate a nonlinear SVM classifier for each partition that can be treated as an approximation model based on the partial dataset. then, we use a linear SVM classifier to fuse the nonlinear SVM classifiers that are generated from all data partitions. In this linear SVM training model, we treat each nonlinear SVM classifier as an "attribute" or an "expert". In the ensemble phase, DESVM generates a fusion model which is a weighted combination of the nonlinear SVM classifiers. It can be explained as a weighted voting decision made by a group of experts. We test our proposed method on five benchmark datasets. the numerical results show that DESVM is competitive in accuracy and has a high speed-up. thus, DESVM can be a powerful tool for binary classification problems with large scale not linearly separable datasets.

关键词： Distributed computing ensemble learning parallel algorithm reduced kernel trick support vector machine

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In-Place Data Sliding algorithms for Many-Core architectures

In-Place Data Sliding Algorithms for Many-Core Architectures

引用

international conference on parallel processing (ICPP)

作者： Juan Gómez Gomez Luna Li-Wen Chang I-Jui Sung Wen-Mei Hwu Nicolás Guil Computer Architecture and Electronics University of Córdoba Córdoba Spain Electrical and Computer Engineering University of Illinois at Urbana-Champaign Urbana Illinois USA MulticoreWare Inc. Champaign Illinois USA Computer Architecture University of Málaga Málaga Spain

In-place data manipulation is very desirable in many-core architectures with limited on-board memory. this paper deals with the in-place implementation of a class of primitives that perform data movements in one direction. We call these primitives Data Sliding (DS) algorithms. Notable among them are relational algebra primitives (such as select and unique), padding to insert empty elements in a data structure, and stream compaction to reduce memory requirements. their in-place implementation in a bulk synchronous parallel model, such as GPUs, is specially challenging due to the difficulties in synchronizing threads executing on different compute units. Using a novel adjacent work-group synchronization technique, we propose two algorithmic schemes for regular and irregular DS algorithms. With a set of 5 benchmarks, we validate our approaches and compare them to the state-of-the-art implementations of these benchmarks. Our regular DS algorithms demonstrate up to 9.11x and 73.25x on NVIDIA and AMD GPUs, respectively, the throughput of their competitors. Our irregular DS algorithms outperform NVIDIA thrust library by up to 3.24x on the three most recent generations of NVIDIA GPUs.

关键词： Synchronization Arrays Graphics processing units parallel processing Compaction Memory management

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11th international Symposium on Applied Reconfigurable Computing, ARC 2015

11th International Symposium on Applied Reconfigurable Compu...

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11th international Symposium on Applied Reconfigurable Computing, ARC 2015

ISBN: (纸本)9783319162133

the proceedings contain 50 papers. the special focus in this conference is on Architecture, Modeling, Tools, Applications, Network-on-a-Chip, Cryptography Applications and Extended Abstracts. the topics include: Reducing storage costs of reconfiguration contexts by sharing instruction memory cache blocks;a vector caching scheme for streaming FPGA SpMV accelerators;hardware synthesis from functional embedded domain-specific languages;operand-value-based modeling of dynamic energy consumption of soft processors in FPGA;a fully parallel particle filter architecture for FPGAs;Teach advanced reconfigurable architectures and tools;dynamic memory management in vivado-HLS for scalable many-accelerator architectures;place and route tools for the mitigation of single event transients on flash-based FPGAs;advanced systemC tracing and analysis framework for extra-functional properties;run-time partial reconfiguration simulation framework based on dynamically loadable components;architecture virtualization for run-time hardware multithreading on field programmable gate arrays;survey on real-time network-on-chip architectures;hardware benchmarking of cryptographic algorithms using high-level synthesis tools;an efficient and flexible FPGA implementation of a face detection system;a dynamically reconfigurable mixed analog-digital filter bank;a timing driven cycle-accurate simulation for coarse-grained reconfigurable architectures;a novel concept for adaptive signal processing on reconfigurable hardware;modular acquisition and stimulation system for timestamp-driven neuroscience experiments;DRAM row activation energy optimization for stride memory access on FPGA-based systems;acceleration of data streaming classification using reconfigurable technology;partial reconfiguration for dynamic mapping of task graphs onto 2D mesh platform and a challenge of portable and high-speed FPGA accelerator.

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Deadline-oriented task scheduling for mapreduce environments 15th

Deadline-oriented task scheduling for mapreduce environments

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15th international conference on algorithms and architectures for parallel processing, ICA3PP 2015

作者： Hu, Minghao Wang, Changjian You, Pengfei Huang, Zhen Peng, Yuxing National Laboratory for Parallel and Distributed Processing School of Computer Science National University of Defense Technology Changsha410072 China

ISBN: (纸本)9783319271217

To provide timely results for ‘Big Data Analytics’, it is crucial to satisfy deadline requirements for MapReduce jobs in production environments. In this paper, we propose a deadline-oriented task scheduling approach, named Dart, to meet the given deadline and maximize the input size if only part of the dataset can be processed before the time limit. Dart uses an iterative estimation method which is based on both historical data and job running status to precisely estimate the realtime job completion time. By comparing the estimated time with the deadline constraint, a YARN-based task scheduler dynamically decides whether continuing or terminating the map *** have validated our approach using workloads from OpenCloud and Facebook on a cluster of 60 virtual machines. the results show that Dart can not only effectively meet the deadline but also process near-maximal data volumes even when the deadline is set to be extremely small and limited resources are allocated. © Springer international Publishing Switzerland 2015.

关键词： MapReduce

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Urban traffic congestion prediction using floating car trajectory data 15th

Urban traffic congestion prediction using floating car traje...

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15th international conference on algorithms and architectures for parallel processing, ICA3PP 2015

作者： Yang, Qiuyuan Wang, Jinzhong Song, Ximeng Kong, Xiangjie Xu, Zhenzhen Zhang, Benshi School of Software Dalian University of Technology Dalian116620 China Key Laboratory of System Control and Information Processing Ministry of Education Shanghai200240 China Key Laboratory of Control Engineering of Henan Province Henan Polytechnic University Jiaozuo454000 China

ISBN: (纸本)9783319271217

Traffic congestion prediction is an important precondition to promote urban sustainable development. Nevertheless, there is a lack of a unified prediction method to address the performance metrics, such as accuracy, instantaneity and stability, systematically. In the paper, we propose a novel approach to predict the urban traffic congestion efficiently with floating car trajectory data. Specially, an innovative traffic flow prediction method utilizing particle swarm optimization algorithm is responsible for calculating the traffic flow parameters. then, a congestion state fuzzy division module is applied to convert the predicted flow parameters to citizens’ cognitive congestion states. We conduct extensive experiments with real floating car data and the experimental results show that our proposed method has advantage in terms of accuracy, instantaneity and stability. © Springer international Publishing Switzerland 2015.

关键词： Traffic congestion

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