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Probabilistic Pharmaceutical Modelling: A Comparison Between Synchronous and Asynchronous Cellular Automata 1

引用

10th international conference on parallel processing and Applied Mathematics (PPAM)

作者： Bezbradica, Marija Ruskin, Heather J. Crane, Martin Dublin City Univ Sch Comp Ctr Sci Res & Complex Syst Modelling Sci Sym Dublin 9 Ireland

ISBN: (数字)9783642551956

ISBN: (纸本)9783642551956

the field of pharmaceutical modelling has, in recent years, benefited from using probabilistic methods based on cellular automata, which seek to overcome some of the limitations of differential equation based models. By modelling discrete structural element interactions instead, these are able to provide data quality adequate for the early design phases in drug modelling. In relevant literature, both synchronous (CA) and asynchronous (ACA) types of automata have been used, without analysing their comparative impact on the model outputs. In this paper, we compare several variations of probabilistic CA and ACA update algorithms for building models of complex systems used in controlled drug delivery, analysing the advantages and disadvantages related to different modelling scenarios. Choosing the appropriate update mechanism, besides having an impact on the perceived realism of the simulation, also has practical benefits on the applicability of different model parallelisation algorithms and their performance when used in large-scale simulation contexts.

关键词： Discrete systems Controlled drug delivery systems Complex modelling parallel algorithms

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parallel Data processing in Dynamic Hybrid Computing Environment Using MapReduce 1

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14th international conference on algorithms and architectures for parallel processing (ICA3PP)

作者： Tang, Bing He, Haiwu Fedak, Gilles Hunan Univ Sci & Technol Sch Comp Sci & Engn Xiangtan 411201 Peoples R China Univ Lyon INRIA UCB Lyon 5668 UMR CNRS ENS Lyon LIP Lab Lyon France

ISBN: (数字)9783319111940

ISBN: (纸本)9783319111940;9783319111933

A novel MapReduce computation model in hybrid computing environment called HybridMR is proposed in the paper. Using this model, high performance cluster nodes and heterogeneous desktop PCs in Internet or Intranet can be integrated to form a hybrid computing environment. In this way, the computation and storage capability of large-scale desktop PCs can be fully utilized to process large-scale datasets. HybridMR relies on a hybrid distributed file system called HybridDFS, and a time-out method has been used in HybridDFS to prevent volatility of desktop PCs, and file replication mechanism is used to realize reliable storage. A new node priority-based fair scheduling (NPBFS) algorithm has been developed in HybridMR to achieve both data storage balance and job assignment balance by assigning each node a priority through quantifying CPU speed, memory size and I/O bandwidth. Performance evaluation results show that the proposed hybrid computation model not only achieves reliable MapReduce computation, reduces task response time and improves the performance of MapReduce, but also reduces the computation cost and achieves a greener computing mode.

关键词： Hybrid Computing Environment Distributed File System MapReduce Volunteer Computing Fault-tolerance

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the Regular Expression Matching Algorithm for the Energy Efficient Reconfigurable SoC

The Regular Expression Matching Algorithm for the Energy Eff...

引用

10th international conference on parallel processing and Applied Mathematics (PPAM)

作者： Russek, Pawel Wiatr, Kazimierz AGH Univ Sci & Technol PL-30059 Krakow Poland

ISBN: (纸本)9783642552243

this paper presents an algorithm for a regular expressions pattern matching system. the goal was to achieve better performance and low energy consumption. the proposed scheme is particularly useful when a large set of complex regular expression patterns must be inspected in parallel (e. g. in computer malware and anti-virus systems). the idea of the algorithm derives from a concept of the Bloom filter algorithm. the Bloom filter operation is used to inspect an incoming data and to find static sub-patterns of regular expressions. When the Bloom filter reports a match, a closer inspection is performed. the Bloom filtering is done by a hardware dedicated co-processor. the regular expressions' wildcard matching part is executed by a CPU. the above concept was implemented and tested on the Xilinx Zynq-7000 All Programmable SoC platform. the results and performance for regular expressions patterns from the ClamAV virus database is given.

关键词： Regular expressions matching Energy-efficient systems Custom architectures HW-SW Co-Design

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Repairing Multiple Data Losses by parallel Max-min Trees Based on Regenerating Codes in Distributed Storage Systems

Repairing Multiple Data Losses by Parallel Max-min Trees Bas...

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14th international conference on algorithms and architectures for parallel processing (ICA3PP)

作者： You, Pengfei Peng, Yuxing Huang, Zhen Wang, Changjian Natl Univ Def Technol Coll Comp Changsha 410073 Hunan Peoples R China

ISBN: (纸本)9783319111940;9783319111933

Due to high storage efficiency, erasure codes are recently used to provide high data reliability in distributed storage systems. When multiple data loses in system, regeneration time for them demands to be as short as possible so as to keep data availbility and reliability. Common way is to repair them one by one, which prolongs the regeneration time. Tree-structured regeneration may reduce regeneration time when regenerating one single node failure by relaying the network traffic, and is also extended to regenerate multiple data losses. In this paper, based on regenerating codes which achieve minimal network traffic during the regeneration, we consider reducing regeneration time by using multiple max-min trees to parallel regenerate multiple data losses. And we proposed an algorithm: bandwidth-sharing max-min algorithm (BSM2RC) to construct multiple parallel max-min trees. It realizes efficient bandwidth utilization by maximizing the minimal bottleneck edge weight of multiple regeneration trees, thus improve regeneration efficiency. Our simulation experiment shows that multiple parallel max-min trees reduce total regeneration time for multiple data losses significantly, and thus enhance system reliability, compared with existing regeneration scheme.

关键词： Distributed storage System Data regeneration Regenerating codes Regeneration tree Max-min tree Maximum spanning tree

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Accelerating Rabin Karp on a Graphics processing Unit (GPU) using Compute Unified Device Architecture (CUDA) 7

Accelerating Rabin Karp on a Graphics Processing Unit (GPU) ...

引用

2014 7th international conference on Information and Automation for Sustainability, ICIAfS 2014

作者： Dayarathne, Nayomi Ragel, Roshan University of Peradeniya Sri Lanka

ISBN: (纸本)9781479945986

String matching or pattern matching algorithms are used in various applications. they are used to find the occurrences of a pattern in a given text or a pool of strings. they are widely used in text editors in computing machines, database queries, bio-informatics, chem-informatics, search engines and many more applications. String matching algorithms can be of two ways: single pattern matching and multiple pattern matching. Rabin Karp is a string searching algorithm that can act in both ways. Since these algorithms are working on large pool of data, achieving higher throughput on the implementation of the algorithm has always been a major concern. parallel implementation of such algorithms can achieve the concerned objective. parallelism could be achieved easily with the rapid development of GPU architectures. In this research, Rabin Karp algorithm is implemented in CUDA C. We have compared CUDA implementation of this algorithm against both its serial CPU implementation and parallel Pthread implementation on multi-core CPUs. Eventually, using the empirical results, we could conclude that the CUDA C implementation of Rabin Karp on the GPU can achieve much high throughput for a large pool of data in string matching. © 2014 IEEE.

关键词： Graphics processing unit

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A parallel, Distributed-Memory Framework for Comparative Motif Discovery 1

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10th international conference on parallel processing and Applied Mathematics (PPAM)

作者： De Witte, Dieter Van Bel, Michiel Audenaert, Pieter Demeester, Piet Dhoedt, Bart Vandepoele, Klaas Fostier, Jan Univ Ghent iMinds Dept Informat Technol INTEC Ghent Belgium

ISBN: (数字)9783642551956

ISBN: (纸本)9783642551956

the increasing number of sequenced organisms has opened new possibilities for the computational discovery of cis-regulatory elements ('motifs') based on phylogenetic footprinting. Word-based, exhaustive approaches are among the best performing algorithms, however, they pose significant computational challenges as the number of candidate motifs to evaluate is very high. In this contribution, we describe a parallel, distributed-memory framework for de novo comparative motif discovery. Within this framework, two approaches for phylogenetic footprinting are implemented: an alignment-based and an alignment-free method. the framework is able to statistically evaluate the conservation of motifs in a search space containing over 160 million candidate motifs using a distributed-memory cluster with 200 CPU cores in a few hours. Software available from http://***/blsspeller/

关键词： Motif discovery Phylogenetic footprinting parallel computing Distributed memory

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20th international conference on parallel processing, Euro-Par 2014

20th International Conference on Parallel Processing, Euro-P...

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20th international conference on parallel processing, Euro-Par 2014

ISBN: (纸本)9783319098722

the proceedings contain 68 papers. the special focus in this conference is on Support tools environments, Performance prediction and evaluation, Scheduling and load balancing, High performance architectures and compilers, parallel and distributed data management, Grid, Cluster and cloud computing, Green high performance computing, Distributed systems and algorithms, parallel and distributed programming, parallel numerical algorithms, Multicore and manycore programming, theory and algorithms for parallel computation and High performance networks and communication. the topics include: MPI trace compression using event flow graphs;customized scalable tracing with in-situ data analysis;performance measurement and analysis of transactional memory and speculative execution on IBM blue Gene/Q;an open-source management framework for cloud applications;modeling and simulation of a dynamic task-based runtime system for heterogeneous multi-core architectures;modeling the impact of reduced memory bandwidth on HPC applications;finding the important basic blocks in multithreaded programs;optimization and trade-off analysis for time, energy and resource usage;performance prediction and evaluation of parallel applications in KVM, Xen, and VMware;per-task DRAM energy metering in multicore systems;characterizing the performance-energy tradeoff of small ARM cores in HPC computation;finding efficient queue setup using high-resolution simulations;a progressively pessimistic scheduler for software transactional memory;a queueing theory approach to pareto optimal bags-of-tasks scheduling on clouds;scheduling/placement approach for task-graphs on heterogeneous architecture;energy-aware multi-organization scheduling problem;energy efficient scheduling of mapreduce jobs and switchable scheduling for runtime adaptation of optimization.

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Acceleration of accurate floating point operations using SIMD 9

Acceleration of accurate floating point operations using SIM...

引用

9th international conference on Computer Engineering & Systems (ICCES)

作者： Abdalla, DiaaEldin M. Zaki, Ahmad M. Bahaa-Eldin, Ayman M. Ain Shams Univ Cairo Egypt

ISBN: (纸本)9781479965946

Several computing systems that use decimal number calculations suffer from the accumulation and propagation of errors. Decimal numbers are represented using specific length floating point formats and hence there will always be a truncation of extra fraction bits causing errors. Several solutions had been proposed for such a problem. Among those accurate calculation systems was the usage of vectors of floating point numbers to represent decimal values with very large accuracy, known as Multi-Number System (MN). Unfortunately, MN calculations are time consuming and are not suitable for real time applications. Several attempts for special architectures had been proposed to speed up those calculations. In this work, the Single Instruction Multiple Data (SIMD) paradigm found in modern CPUs is exploited to accelerate the MN calculations. the basic arithmetic operation algorithms had been modified to utilize the SIMD architecture and a new Square representation of operands had been proposed, this representation was introduced because the MN operations are sequential and iterative, and thus we can't apply the SIMD parallel instructions directly. the proposed architecture has an execution time that is 35 % of the original MN execution time for the division, which is the most time consuming operation while preserving the same accuracy.

关键词： floating point arithmetic parallel processing CPU MN calculations MN execution time SIMD architecture SIMD parallel instructions basic arithmetic operation algorithms computing systems decimal number calculations decimal values execution time floating point numbers floating point operations fraction-bit truncation multinumber system single-instruction multiple data paradigm specific-length floating point formats square representation Manganese floating point arithmetic SIMD architecture execution time single instruction multiple datastream manganese central processing units FLOATING POINTS parallel processing (COMPUTERS) acceleration

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Programmable Systems-on-Chip for Information processing 8

Programmable Systems-on-Chip for Information Processing

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8th IEEE international conference on Application of Information and Communication Technologies (AICT)

作者： Sklyarov, Valery Skliarova, Iouilia Univ Aveiro Dept Elect Telecommun & Informat IEETA Aveiro Portugal

ISBN: (纸本)9781479941209

Information processing is a very broad area in which many problems are computationally intensive and thus, they require parallelization and acceleration based on new technologies. the Xilinx Zynq-7000 all programmable system-on-chip can be seen as a very adequate platform permitting application-specific software and problem-targeted hardware to be coupled on a single configurable microchip. the tutorial is dedicated to multi-level software/hardware co-design techniques and system architectures that combine general-purpose computers, multi-core application-specific processing, and accelerators in reconfigurable hardware with emphasis on broad parallelism. Four projects from the scope of data processing, application informatics, parallel algorithms (mapped to hardware), and combinatorial search are briefly characterized and will be demonstrated in fully implemented and ready to test projects that include software and reconfigurable hardware linked with on-chip high-performance interfaces. Particular design examples, potential practical applications, experiments and comparisons will be demonstrated.

关键词： Information processing high-performance computing parallelism programmable systems-on-chip

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Adaptive Load Balancing for Massively parallel Multi-Level Monte Carlo Solvers

Adaptive Load Balancing for Massively Parallel Multi-Level M...

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10th international conference on parallel processing and Applied Mathematics (PPAM)

作者： Sukys, Jonas ETH Zurich Switzerland

ISBN: (纸本)9783642552243

the Multi-Level Monte Carlo algorithm was shown to be a robust solver for uncertainty quantification in the solutions of multidimensional systems of stochastic conservation laws. For random fluxes or random initial data with large variances, the time step of the explicit time stepping scheme becomes random due to the random CFL stability restriction. Such sample path dependent complexity of the underlying deterministic solver renders our static load balancing of the MLMC algorithm very inefficient. We introduce an adaptive load balancing procedure based on two key ingredients: (1) pre-computation of the time step size for each draw of random inputs (realization), (2) distribution of the samples using the greedy algorithm to "workers" with heterogeneous speeds of execution. Numerical experiments showing strong scaling are presented.

关键词： Uncertainty quantification Conservation laws Multi-level Monte Carlo FVM Load balancing Greedy algorithms Linear scaling

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