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DVT-PKM: An Improved GPU Based parallel K-Means Algorithm

DVT-PKM: An Improved GPU Based Parallel K-Means Algorithm

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10th international conference on Intelligent Computing (ICIC)

作者： Yan, Bo Zhang, Ye Yang, Zijiang Su, Hongyi Zheng, Hong Beijing Inst Technol Beijing 100081 Peoples R China York Univ Sch informat technol Toronto ON Canada

ISBN: (纸本)9783319093390;9783319093383

K-Means clustering algorithm is a typical partition-based clustering algorithm. Its two major disadvantages lie in the facts that the algorithm is sensitive to initial cluster centers and the outliers exert significant influence on the clustering results. In addition, K-Means algorithm traverses and computes all the data multiple times. thus, the algorithm is not efficient when dealing with large data sets. In order to overcome the above limitations, this paper proposes to exclude the outliers using the minimum number of points in the d-dimensional hypersphere area. then k cluster centers can be obtained by adjusting the threshold making use of density idea. Finally, K-Means algorithm will be integrated with Compute Unified Device Architecture (CUDA). the time efficiency is improved considerably through taking advantage of computing power of Graphic processing Unit (GPU). We use the ratio of distance between classes to distance within classes and speedup as the evaluation criteria. the experiments indicate that the proposed algorithm significantly improves the stability and running efficiency of K-Means algorithm.

关键词： K-Means density Graphic processing Unit

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Individual based modeling of angiogenesis in three dimensions on a graphics processing unit 10

Individual based modeling of angiogenesis in three dimension...

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10th international conference on Advances in Fluid Mechanics, AFM 2014

作者： Parsonson, L. Bai, L. School of Computer Science University of Nottingham United Kingdom

ISBN: (纸本)9781845647902

Angiogenesis, the formation of de novo blood vessels, has been implicated in a long list of human disorders, including cancer, diabetes, and in recent years, neurodegenerative diseases, a list that continues to grow. Study of the formation of microvasculature, therefore, has important implications in diagnosis and treatment of diseases. this paper describes how we combine a CPUbased Cellular Potts model of sprouting angiogenesis in three dimensions with medical imaging techniques and graphics processing unit (GPU) accelerated fluid dynamics equations to create an individual-based angiogenesis simulation. the use of GPU, optimized for fast, highly parallel mathematical operations, provides an increase in simulation speed and balances resource requirements across hardware. Specifically, micro-CT scans of resin cast rat cerebral vasculature are segmented to remove reconstruction artifacts and are imported to instantiate nascent endothelial cells in a homogeneous three-dimensional grid that represents the area over which the simulation is performed. A growth factor source is added, and simulation of steady production and diffusion of the vascular endothelial growth factor (VEGF) is performed on the GPU using the NVidia Compute Unified Device Architecture (CUDA) programming platform. Motion of individual endothelial cells is then tracked over the lifetime of the simulation towards the source of growth factor, incorporating both sprouting and anastamosis events. © 2014 WIT Press.

关键词： Graphics processing unit

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Document clustering using Multi-Objective Genetic algorithms with parallel programming based on CUDA

Document clustering using Multi-Objective Genetic Algorithms...

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international conference on Informatics in Control, Automation and Robotics (ICINCO)

作者： Jung Song Lee Soon Cheol Park Jong Joo Lee Han Heeh Ham Division of Electronics and Information Engineering Chonbuk National University Jeonju-si Republic of Korea Department of Korean Language and Literature Chonbuk National University Jeonju-si Republic of Korea Department of Archeology and Cultural Anthropology Chonbuk National University Jeonju-si Republic of Korea

In this paper, we propose a method of enhancing Multi-Objective Genetic algorithms (MOGAs) for document clustering with parallel programming. the document clustering using MOGAs shows better performance than other clustering algorithms. However, the overall computation time of the MOGAs is considerably long as the number of documents increases. To effectively avoid this problem, we implement the MOGAs with General-Purpose computing on Graphics processing Units (GPGPU) to compute the document similarities for the clustering. Furthermore, we introduce two thread architectures (Term-threads and Document-threads) in the CUDA (Compute Unified Device Architecture) language. the experimental results show that the parallel MOGAs with CUDA are tremendously faster than the general MOGAs.

关键词： Graphics processing units Genetic algorithms Instruction sets Vectors Linear programming Computer architecture Sociology

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Accelerating kirchhoff migration on GPU using directives 1

Accelerating kirchhoff migration on GPU using directives

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1st Workshop on Accelerator Programming Using Directives, WACCPD 2014 - Held in Conjunction with the international conference for High Performance Computing, Networking, Storage and Analysis, SC 2014

作者： Xu, Rengan Hugues, Maxime Calandra, Henri Chandrasekaran, Sunita Chapman, Barbara Department of Computer Science University of Houston HoustonTX United States TOTAL e and P Research and Technology USA HoustonTX United States

ISBN: (纸本)9781479970230

Accelerators offer the potential to significantly improve the performance of scientific applications when offloading compute intensive portions of programs to the accelerators. However, effectively tapping their full potential is difficult owing to the programmability challenges faced by the users when mapping computation algorithms to the massively parallel architectures such as ***-based programming models offer programmers an option to rapidly create prototype applications by annotating region of code for offloading with hints to the compiler. this is critical to improve the productivity in the production code. In this paper, we study the effectiveness of a high-level directivebased programming model, OpenACC, for parallelizing a seismic migration application called Kirchhoff Migration on GPU architecture. Kirchhoff Migration is a real-world production code in the Oil & Gas industry. Because of its compute intensive property, we focus on the computation part and explore different mechanisms to effectively harness GPU's computation capabilities and memory hierarchy. We also analyze different loop transformation techniques in different OpenACC compilers and compare their performance differences. Compared toone socket (10 CPU cores) on the experimental platform, one GPU achieved a maximum speedup of 20.54x and 6.72x for interpolation and extrapolation kernel functions. © 2014 IEEE.

关键词： Graphics processing unit

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An improved GPU MapReduce framework for data intensive applications

An improved GPU MapReduce framework for data intensive appli...

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IEEE international conference on Intelligent Computer Communication and processing (ICCP)

作者： Razvan Nitu Elena Apostol Valentin Cristea Faculty of Automatic Control and Computers University Politehnica of Bucharest

the MapReduce paradigm is one of the best solutions for implementing distributed applications which perform intensive data processing. In terms of performance regarding this type of applications, MapReduce can be improved by adding GPU capabilities. In this context, the GPU clusters for large scale computing can bring a considerable increase in the efficiency and speedup of data intensive applications. In this article we present a framework for executing MapReduce using GPU programming. We describe several improvements to the concept of GPU MapReduce and we compare our solution with others.

关键词： Graphics processing units Mars Process control Kernel Memory management parallel processing Vectors

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Fast GPU parallel N-Body tree traversal with Simulated Wide-Warp

Fast GPU parallel N-Body tree traversal with Simulated Wide-...

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international conference on parallel and Distributed Systems (ICPADS)

作者： Wagner M. Nunan Zola Luis C. E. Bona Fabiano Silva Federal University of Paraná Curitiba PR Brazil

ISBN: (纸本)9781479976164

the Barnes-Hut algorithm is a widely used approximation method for the N-Body simulation problem. the irregular nature of this tree walking code presents interesting challenges for its computation on parallel systems. Additional problems arise in effectively exploiting the processing capacity of GPU architectures. We propose and investigate the applicability of software Simulated Wide-Warps (SWW) in this context. To this extent, we explicitly deal with dynamic irregular patterns in data accesses with data remapping and data transformation, by controlling execution flow divergence of threads. We present a new compact data-structure for the tree layout, GPU parallel algorithms for tree transformation and parallel walking using SWW. Benefits of our techniques are in transposing the tree algorithm to execute regular patterns to match the GPU model. Our experiments show significant performance improvement over the best known GPU solutions to this algorithm.

关键词： Instruction sets Kernel Layout Graphics processing units Octrees Registers Indexes

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parallel implementation of the matrix rank test for randomness assessment

Parallel implementation of the matrix rank test for randomne...

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IEEE international conference on Intelligent Computer Communication and processing (ICCP)

作者： Kinga Márton Vlad Bâja Alin Suciu Computer Science Department Technical University of Cluj-Napoca Cluj-Napoca Romania

the quality evaluation of random number sequences is a rather complex and resource-expensive process with a peculiar property: there is no finite amount of testing that can ensure perfect randomness. Yet applying multiple randomness tests, each evaluating the sequence from one specific and significant point of view, is vital for obtaining relevant results which can guide the tester in accepting or rejecting the considered random number sequence. therefore, aiming to satisfy the increasing demand for large volumes of high quality random data, there is a stringent need for high performance and flexible statistical tests in order to provide a more comprehensive assessment. Our work enrolls in this direction and this paper introduces the improved, extended and parallelized Matrix Rank Test (the 5 th test of the NIST Statistical Test Suite), describing several enhancement methods. Experimental results prove the significant performance improvement compared to the original version and show the comparative efficiencies of the proposed parallel implementations.

关键词： NIST Testing Batteries Generators Optimization Data structures Memory management

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Performance Characterization and Evaluation of HPC algorithms on Dissimilar Multicore architectures

Performance Characterization and Evaluation of HPC Algorithm...

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IEEE international conference on High Performance Computing and Communications (HPCC)

作者： S. P. T. Krishnan Bharadwaj Veeravalli Institute for Infocomm Research Agency for Science Technology and Research Singapore

ISBN: (纸本)9781479961245

In this paper, we share our experiences in using two important yet different High Performance Computing (HPC)architectures for evaluating two HPC algorithms. the first architecture is an Intel x64 ISA based homogenous multicore with Uniform Memory Access (UMA) type shared-memory based Symmetric Multi-processing system. the second architecture is an IBM Power ISA based heterogenous multicore with Non-Uniform Memory Access (NUMA) based distributed-memoryAsymmetric Multi-processing system. the two HPC algorithms are for predicting biological molecular structures, specifically the RNA secondary structures. the first algorithm that we created is a parallelized version of a popular serial RNA secondary structure prediction algorithm called PKNOTS. the second algorithm is a new parallel-by-design algorithm that we have developed called MARSs. Using real Ribo-Nucleic Acid(RNA) sequences, we conducted large-scale experiments involving hundreds of sequences using the above two algorithms. Based on thousands of data points that we collected as an outcome of our experiments, we report on the observed performance metrics for both the algorithms on the two architectures. through our experiments, we infer that architectures with specialized coprocessors for number-crunching along with high-speed memory bus and dedicated bus controllers generally perform better than general-purpose multi-processor architectures. In addition, we observed that algorithms that are intrinsically parallelized by design are able to scale & perform better by taking advantage of the underlying parallel architecture. We further share best practices on handling scalability aspects with regards to workload size. We believe our results are applicable to other HPC applications on similar HPC architectures.

关键词： Prediction algorithms RNA Multicore processing Program processors Measurement Algorithm design and analysis

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Accelerating Rabin Karp on a Graphics processing Unit (GPU) using Compute Unified Device Architecture (CUDA)

Accelerating Rabin Karp on a Graphics Processing Unit (GPU) ...

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international conference on Information and Automation for Sustainability (ICIAfS)

作者： Nayomi Dayarathne Roshan Ragel University of Peradeniya

String matching or pattern matching algorithms are used in various applications. they are used to find the occurrences of a pattern in a given text or a pool of strings. they are widely used in text editors in computing machines, database queries, bio-informatics, chem-informatics, search engines and many more applications. String matching algorithms can be of two ways: single pattern matching and multiple pattern matching. Rabin Karp is a string searching algorithm that can act in both ways. Since these algorithms are working on large pool of data, achieving higher throughput on the implementation of the algorithm has always been a major concern. parallel implementation of such algorithms can achieve the concerned objective. parallelism could be achieved easily with the rapid development of GPU architectures. In this research, Rabin Karp algorithm is implemented in CUDA C. We have compared CUDA implementation of this algorithm against both its serial CPU implementation and parallel Pthread implementation on multi-core CPUs. Eventually, using the empirical results, we could conclude that the CUDA C implementation of Rabin Karp on the GPU can achieve much high throughput for a large pool of data in string matching.

关键词： Graphics processing units Algorithm design and analysis Pattern matching Instruction sets Indexes Computer architecture throughput

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Design of an accelerator-rich architecture by integrating multiple heterogeneous coarse grain reconfigurable arrays over a network-on-chip

Design of an accelerator-rich architecture by integrating mu...

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international conference on Application Specific Systems (ASAP), architectures and Processors

作者： Waqar Hussain Roberto Airoldi Henry Hoffmann Tapani Ahonen Jari Nurmi Department of Electronics and Communications Engineering Tampere University of Technology Tarnpere Finland Department of Computer Science University of Chicago USA

this paper presents an accelerator-rich system-on-chip (SoC) architecture integrating many heterogeneous Coarse Grain Reconfigurable Arrays (CGRA) connected through a Network-on-Chip (NoC). the architecture is designed to maximize the reconfigurable processing capacity for the execution of massively parallel algorithms. the central node of the NoC contains a Reduced Instruction Set Computer (RISC) core that manages distribution of computing functions and data within the SoC while the other nodes contain CGRAs of application-specific sizes. Prior approaches coupled only a few accelerators with a RISC core using special instructions and/or a direct memory access device. In contrast, our design couples a RISC core to many CGRAs through the NoC. this approach provides for independent and simultaneous execution of multiple computing kernels. Furthermore, the proposed architecture mitigates power dissipation as CGRA sizes are tailored for the individual application kernels. We present a proof-of-concept design with a total of 408 reconfigurable processing elements. this instance and its sub-systems are customized and tested for different computationally-intensive signal processing algorithms. the overall single-chip computing system is synthesized for a Field Programmable Gate Array device. We present comparison to and evaluation against some of the existing multicore systems in terms of multiple performance metrics.

关键词： Reduced instruction set computing Data transfer Acceleration Kernel Switches Multicore processing

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