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检索条件"任意字段=10th International Conference on Algorithms and Architectures for Parallel Processing"

共 2805 条记录，以下是1271-1280 订阅

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parallel Implementations of Motion Estimation algorithms using OpenCL

Parallel Implementations of Motion Estimation Algorithms usi...

引用

18th international conference on Digital Signal processing (DSP)

作者： Heikkinen, Antti Fono, Lance VTT Tech Res Ctr Finland Oulu Finland

ISBN: (纸本)9781467358057

parallel processors such as Graphics processing units (GPUs) have emerged as co-processing units for central processing units (CPUs) to accelerate different applications. Open Computing Language (OpenCL) is a framework for multiprocessing in heterogeneous platforms. In this paper we focus on motion estimation which is the most time consuming task in video coding. We study two motion estimation algorithms in terms of parallel execution. We implemented the full search algorithm and the hierarchical search algorithm with OpenCL and with C code. Our measurements show that the OpenCL-based implementations of the algorithms on the GPU can achieve nearly 10 times speedup compared to the corresponding C implementation on a single CPU.

关键词： Hieararchical motion estimation Full search motion estimation OpenCL parallel GPU Video coding

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parallelIZATION OF BITONIC SORT AND RADIX SORT algorithms ON MANY CORE GPUS

PARALLELIZATION OF BITONIC SORT AND RADIX SORT ALGORITHMS ON...

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10th international conference on Electronics, Computer and Computation (ICECCO)

作者： Yildiz, Zehra Aydin, Musa Yilmaz, Guray Okan Univ Dept Informat Syst & Technol Istanbul Turkey Istanbul Aydin Univ Dept Elect & Elect Engn Istanbul Turkey Turkish Air Force Acad Dept Comp Engn Istanbul Turkey

ISBN: (纸本)9781479933433

Data sorting is used in many fields and plays an important role in defining the overall speed and performance. there are many sorting categories. In this study, two of these sorting algorithms that are bitonic sort and radix sort are dealt with. We have designed and developed Radix Sort and Bitonic Sort algorithms for many core Graphics processing Units (GPUs). Although bitonic sort is a concurrent sorting algorithm, radix sort is a distribution sorting algorithm, i.e. both of these algorithms are not usual sorting algorithms. they can be parallelized on GPUs easily to get better performance than other sorting algorithms. We parallelized these sorting algorithms on many core GPUs using the Compute Unified Device Architecture (CUDA) platform, developed by NVIDIA Corporation and got some performance measurements.

关键词： Graphics processing Unit radix sort bitonic sort parallel computing parallel sorting algorithm CUDA

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On the sublinear processor gap for parallel architectures

On the sublinear processor gap for parallel architectures

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10th international conference on theory and Applications of Models of Computation, TAMC 2013

作者： López-Ortiz, Alejandro Salinger, Alejandro David R. Cheriton School of Computer Science University of Waterloo Canada

ISBN: (纸本)9783642382352

In the past, parallel algorithms were developed, for the most part, under the assumption that the number of processors is Θ(n) (where n is the size of the input) and that if in practice the actual number was smaller, this could be resolved using Brent's Lemma to simulate the highly parallel solution on a lower-degree parallel architecture. In this paper, however, we argue that design and implementation issues of algorithms and architectures are significantly different-both in theory and in practice-between computational models with high and low degrees of parallelism. We report an observed gap in the behavior of a parallel architecture depending on the number of processors. this gap appears repeatedly in both empirical cases, when studying practical aspects of architecture design and program implementation as well as in theoretical instances when studying the behaviour of various parallel algorithms. It separates the performance, design and analysis of systems with a sub-linear number of processors and systems with linearly many processors. More specifically we observe that systems with either logarithmically many cores or with O(nα) cores (with α

关键词： parallel architectures

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Energy to Solution: A New Mission for parallel Computing

Energy to Solution: A New Mission for Parallel Computing

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19th international conference on Euro-Par

作者： Bode, Arndt Leibniz Supercomp Ctr Garching Germany

ISBN: (纸本)9783642400476

For a long period in the development of computers and computing efficient applications were only characterized by computational - and memory complexity or in more practical terms elapsed computing time and required main memory capacity. the history of Euro-Par and its predecessor-organizations stands for research on the development of ever more powerful computer architectures that shorten the compute time both by faster clocking and by parallel execution as well as the development of algorithms that can exhibit these parallel architectural features. the success of enhancing architectures and algorithms is best described by exponential curves regarding the peak computing power of architectures and the efficiency of algorithms. As microprocessor parts get more and more power hungry and electricity gets more and more expensive, "energy to solution" is a new optimization criterion for large applications. this calls for energy aware solutions.

关键词： Power management

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algorithms and architectures for parallel processing - 12th international conference, ICA3PP 2012, Proceedings

Algorithms and Architectures for Parallel Processing - 12th ...

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12th international conference on algorithms and architectures for parallel processing, ICA3PP 2012

ISBN: (纸本)9783642330643

the proceedings contain 73 papers. the topics discussed include: accelerating the dynamic programming for the optimal polygon triangulation on the GPU;security computing for the resiliency of protecting from internal attacks in distributed wireless sensor networks;optimization of a short-range proximity effect correction algorithm in e-beam lithography using GPGPUs;vectorized algorithms for Quadtree construction and descent;an optimal parallel prefix-sums algorithm on the memory machine models for GPUs;enhancing the performance of a distributed mobile computing environment by topology construction;maintaining consistency in software transactional memory through dynamic versioning tuning;a new low latency parallel turbo decoder employing parallel phase decoding method;high-performance matrix multiply on a massively multithreaded Fiteng1000 processor;and on construction of Cloud IaaS for VM live migration using KVM and OpenNebula.

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Ray-Tracing-Based Geospatial Optimization for Heterogeneous architectures Enhancing Situational Awareness

Ray-Tracing-Based Geospatial Optimization for Heterogeneous ...

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IEEE 16th international conference on Computational Science and Engineering (CSE)

作者： Richie, David A. Ross, James A. Park, Song J. Shires, Dale R. Brown Deer Technol Forest Hill MD 21050 USA Dynam Res Corp Andover MA 01810 USA US Army Res Lab Aberdeen Proving Ground MD 21005 USA

ISBN: (纸本)9781479948970

this paper presents the implementation of ray-tracing-based algorithms for multi-objective geospatial optimization targeting various many-core processing technologies such as graphics processing units, x86 multi-cores, and ARM processors. High performance is achieved through highly parallel core algorithms, executed on multiple compute devices across a heterogeneous architecture using low-level OpenCL kernels. algorithms for calculating line-of-sight ballistic threat, visual observability, ground plane extraction, and Markov chain Monte Carlo optimization provide an augmented geospatial intelligence and situational awareness in three-dimensional urban environments.

关键词： GPGPU parallel computing heterogeneous systems line-of-sight geospatial optimization

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algorithms and architectures for parallel processing - 12th international conference, ICA3PP 2012, Proceedings

Algorithms and Architectures for Parallel Processing - 12th ...

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12th international conference on algorithms and architectures for parallel processing, ICA3PP 2012

ISBN: (纸本)9783642330773

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Conflict-free data access for multi-bank memory architectures using padding

Conflict-free data access for multi-bank memory architecture...

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20th international conference on High Performance Computing (HiPC)

作者： Sohl, Joar Wang, Jian Karlsson, Andreas Liu, Dake Linkoping Univ Dept Comp Engn Linkoping Sweden

ISBN: (纸本)9781479907298

For high performance computation memory access is a major issue. Whether it is a supercomputer, a GPGPU device, or an Application Specific Instruction set Processor (ASIP) for Digital Signal processing (DSP) parallel execution is a necessity. A high rate of computation puts pressure on the memory access, and it is often non-trivial to maximize the data rate to the execution units. Many algorithms that from a computational point of view can be implemented efficiently on parallel architectures fail to achieve significant speed-ups. the reason is very often that the speed-up possible with the available execution units are poorly utilized due to inefficient data access. this paper shows a method for improving the access time for sequences of data that are completely static at the cost of extra memory. this is done by resolving memory conflicts by using padding. the method can be automatically applied and it is shown to significantly reduce the data access time for sorting and FFTs. the execution time for the FFT is improved with up to a factor of 3.4 and for sorting by a factor of up to 8.

关键词： Access to Information information retrieval PADDING Memory architecture sorting programs parallel architectures Storage access times execution time Data transfer rates Memory Memory Fast Fourier transform Digital signal processing

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On the Impact of Fractal Organization on the Performance of Socio-technical Systems

On the Impact of Fractal Organization on the Performance of ...

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IEEE 10th international conference on Ubiquitous Intelligence and Computing (UIC) / IEEE 10th international conference on Autonomic and Trusted Computing (ATC)

作者： De Florio, Vincenzo Sun, Hong Buys, Jonas Blondia, Chris Univ Antwerp iMinds Res Inst PATS Res Grp Middelheimlaan 1 B-2020 Antwerp Belgium AGFA Hlth Care Ghent Belgium

ISBN: (纸本)9781479924813

Fractal organizations are a class of bio-inspired distributed hierarchical architectures in which control and feedback information are allowed to flow independently of the position the participating nodes have in the system hierarchy. In this paper we discuss the adoption of a fractal organization in a class of socio-technical systems characterized by a centralized architecture. We present the key architectural traits of the resulting Fractal Social Organization and put forward our conjecture that services based on the presented solution may exhibit significant improvements, e.g., in terms of scalability and performance. In order to provide elements to justify our conjecture we describe how we envision the use of the new organization in two different cases: a framework for semantic service description-and-matching and a low-cost telemonitoring service.

关键词： Distributed organizations Fractal organization Fractal social organizations Middleware technology Semantic processing Social Overlay Networks

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Scalability and Efficiency of Database Queries on Future Many-core Systems

Scalability and Efficiency of Database Queries on Future Man...

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21st Euromicro international conference on parallel, Distributed, and Network-Based processing (PDP)

作者： Petrides, Panayiotis Diavastos, Andreas Christofi, Constantinos Trancoso, Pedro Univ Cyprus Dept Comp Sci Nicosia Cyprus

ISBN: (纸本)9780769549392;9781467353212

Decision Support System (DSS) workloads are known to be one of the most time-consuming database workloads that process large data sets. Traditionally, DSS queries have been accelerated using large-scale multiprocessors. In this work we exploit the benefits of using future many-core architectures, more specifically on-chip clustered many-core architectures. To achieve this goal we propose different representative data parallel versions of the original database scan and join algorithms. We also study the impact on the performance when on-chip memory, shared among all cores, is used as a prefetching buffer. For our experiments we study the behaviour of three queries from the standard DSS benchmark TPC-H executing on the Intel Single chip Cloud Computer experimental processor (Intel SCC). Our results show that parallelism can be well exploited by such architectures and how important it is to have a balance between computation and data intensity. Moreover, from our experimental results we show that performance improvement of 5x and 10x for the corresponding query implementation without data prefetching. Finally we show how we could efficiently use the system in order to achieve high power-performance efficiency when using the proposed prefetching buffer.

关键词： buffer storage coprocessors decision support systems parallel architectures query processing shared memory systems

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