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检索条件"任意字段=10th International Conference on Algorithms and Architectures for Parallel Processing"

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Exploration of power optimal implementation technique of 128-PT FFT/IFFT for WPAN using pseudo- parallel datapath structure

Exploration of power optimal implementation technique of 128...

引用

10th IEEE Singapore international conference on Communications Systems, ICCS 2006

作者： Mathew, J. Maharatna, K. Pradhan, D.K. Vinod, A.P. University of Bristol MVB Bristol United Kingdom Nanyang Technological University Singapore Singapore

ISBN: (纸本)1424404118

An optimal implementation of 128-Pt FFT/IFFT for low power IEEE 802.15.3a WPAN using pseudo-parallel datapath structure is presented, where the 128-Pt FFT is devolved into 8-Pt and 16-Pt FFTs and then once again by devolving the 16-Pt FFT into 44 and 28. We analyze 128-Pt FFT/IFFT architecture for various pseudo-parallel 8-Pt and 16-Pt FFTs and an optimum datapath architecture is explored. It is suggested that there exist an optimum degree of parallelism for the given algorithm. the analysis demonstrated that with modest increase in area one can achieve significant reduction in power. the proposed architectures complete one parallel-to-parallel (i.e., when all input data are available in parallel and all output data are generated in parallel) 128-point FFT computation in less than 312ns and thereby meeting the standard specification. the relative merits and demerits of these architectures have been analyzed from the algorithm as well as implementation point of view. Detailed power analysis of each of the architectures with different number of data paths at block level is described. We found that from power perspective the architecture with eight datapaths is optimum. the core power consumption with optimum case is 60.6mw which is only less than half of the latest reported 128-point FFT design in 0.18u technology. Apart from the low power consumption, the advantages of the proposed architectures include reduced hardware complexity, regular data flow and simple counter based control. © 2006 IEEE.

关键词： Fast Fourier transforms

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Direct measurement of yarn mass with 1mm accuracy using capacitive sensors

Direct measurement of yarn mass with 1mm accuracy using capa...

引用

10th World Multi-conference on Systemics, Cybernetics and Informatics/12th international conference on Information Systems Analysis and Synthesis

作者： Carvalho, Vitor Monteiro, Joao Vasconcelos, Rosa Soares, Filomena O. Minho Univ Dept Ind Elect P-4800058 Guimaraes Portugal Minho Univ Dept Text Engn P-4800058 Guimaraes Portugal

ISBN: (纸本)9789806560697

In Textile production, measurement of yarn mass m 1 mm range is of utmost importance to evaluate evenness correctly, as several irregularities occur in hum to 4 mm yarn length. Direct measurements in the 1mm range are not available in commercial equipments: yarn analysis is based on samples of 8mm. this paper presents a system which enables direct mass measurement in the 1mm range based on parallel capacitive sensors and signal processing techniques for detection of periodical errors. Results point out that evaluation of yam mass, with this approach, is feasible in 1 mm range, allowing, on-line measurement (1 mm yarn mass) in a spinning frame for real-time control. Spite low signal to noise ratio (SNR) it is possible to measure small variations of yam mass (note that there is a typical capacity variation of 2,08E-17 F for 57 tex - 0,057 g/m of yarn). As a spin-off of this project, a new low-cost system was prepared for use in knitting flat machines to control yam break and bobbin end. Online quality classification is also feasible with the developed system.

关键词： yarn evenness capacitive sensor signal processing

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parallel high-dimensional index structure using cell-based filtering for multimedia data

引用

ISPA 2006 international conference

作者： Chang, Jae-Woo Kim, Yong-Ki Kim, Young-Jin Chonbuk Natl Univ Dept Comp Eng Jeonju 561756 South Korea

ISBN: (纸本)9783540498605

A large number of high-dimensional index structures suffer from the so called 'dimensional curse' problem, i.e., the retrieval performance becomes increasingly degraded as the dimensionality is increased. To solve this problem, the cell-based filtering scheme has been proposed, but it shows a linear decrease in performance as the dimensionality is increased. In this paper, we propose a parallel high-dimensional index structure using the cell-based filtering for multimedia data so as to cope with the linear decrease in retrieval performance. In addition, we devise data insertion, range query and k-NN query processing algorithms which are suitable for the cluster-based parallel architecture. Finally, we show that our parallel index structure achieves good retrieval performance in proportion to the number of servers in the cluster-based architecture and it outperforms a parallel version of the VA-File when the dimensionality is over 10.

关键词： parallel architectures

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4th international Symposium on parallel and Distributed processing and Applications, ISPA 2006

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4th international Symposium on parallel and Distributed processing and Applications, ISPA 2006

ISBN: (纸本)9783540680673

the proceedings contain 84 papers. the special focus in this conference is on architectures, Networks, Languages and algorithms. the topics include: the impact of multicore on math software and exploiting single precision computing to obtain double precision results;trends in high performance computing for industry and research;emerging technologies and large scale facilities in HPC;architecture and performance of dynamic offloader for cluster network;dynamic anchor based mobility management scheme for mobile IP networks;choosing a load balancing scheme for agent-based digital libraries;the optimum network on chip architectures for video object plane decoder design;a hardware NIC scheduler to guarantee QOS on high performance servers;multihomed routing in multicast service overlay network;region-based multicast routing protocol with dynamic address allocation scheme in mobile ad-hoc networks;limiting the effects of deafness and hidden terminal problems in directional communications;enforcing dimension-order routing in on-chip torus networks without virtual channels;a distributed backbone formation algorithm for mobile ad hoc networks;randomized leader election protocols in noisy radio networks with a single transceiver;a hybrid intelligent preventive fault-tolerant QOS unicast routing scheme in IP over DWDM optical internet;adaptive technique for automatic communication access pattern discovery applied to data prefetching in distributed applications using neural networks and stochastic models;process scheduling using ant colony optimization techniques and interference aware dynamic subchannel allocation in a multi-cellular OFDMA system based on traffic situation.

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Quantum mechanical approaches to information processing 06

Quantum mechanical approaches to information processing

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20th Annual international conference on Supercomputing, ICS 2006

作者： Prawer, Steven Centre of Excellence for Quantum Computer Technology School of Physics University of Melbourne

ISBN: (纸本)1595932828

Unless new paradigms can be developed for information processing the end is in sight for Moore's Law which has guided the development of the computer industry for nearly half a century. One such paradigm shift is to design and engineer a new generation of algorithms and devices which exploit fundamental quantum mechanical properties such as quantum superposition and entanglement for both information processing and transmission. Entanglement offers the possibility of enormous speed up due to massively parallel operation. However, this requires new ways of thinking regarding the very nature of information processing in which measurement and read-out are intrinsic to successful quantum algorithms. For transmission of information, quantum superposition offers the possibility of communications whose absolute security is guaranteed by the laws of quantum mechanics. But how close are we to being able to translate this potential into practical machines? the technical challenges are formidable because these devices need to control and manipulate individual atoms, electrons or photons. Nevertheless impressive progress has been made over the past five years. the very simplest devices which involve only one or two active quantum bits (qubits) are already finding application in ultra-secure communications systems using quantum key distribution. this requires a single photon source (i.e. a source that produces one and only one photon per pulse) and we will review our progress in fabricating such sources based on advanced diamond technology. Scaling up to many qubit architectures is even more challenging, but highly sophisticated devices which operate at the single electron level have recently been demonstrated. these devices represent the basic building blocks for a quantum information processor which, when integrated, may from the basis of practical quantum computing machines. In this talk, I will attempt to show how recent progress provides a glimpse into one possible version o

关键词： Data processing

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Developing parallel cell-based filtering scheme under shared-nothing cluster-based architecture

引用

6th international conference on Next Generation Information Technologies and Systems

作者： Chang, Jae-Woo Wang, Tae-Woong Chonbuk Natl Univ Dept Comp Engn Chonju 561756 Chonbuk South Korea

ISBN: (纸本)3540354727

A large number of high-dimensional index structures suffer from the so called 'dimensional curse' problem, i.e., the retrieval performance becomes increasingly degraded as the dimensionality is increased. To solve this problem, the cell-based filtering (CBF) scheme has been proposed, but it shows a linear decrease in performance as the dimensionality is increased. In this paper, we develop a parallel CBF scheme under an SN(Shared Nothing) cluster-based parallel architecture, so as to cope with the linear decrease in retrieval performance. In addition, we devise data insertion, range query and k-NN query processing algorithms which are suitable for the SN parallel architecture. Finally, we show that our parallel CBF scheme achieves good retrieval performance in proportion to the number of servers in the SN architecture and it outperforms a parallel version of the VA-File when the dimensionality is over 10.

关键词： Computer architecture

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A Design Methodology for Hardware Acceleration of Adaptive Filter algorithms in Image processing

A Design Methodology for Hardware Acceleration of Adaptive F...

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international conference on Application Specific Systems (ASAP), architectures and Processors

作者： Hritam Dutta Frank Hannig Jurgen Teich Benno Heigl Heinz Hornegger Department of Computer Science 12 University of Erlangen Nuremberg Nuremberg Germany Medical Solutions AX Siemens AG Communications Forchheim Germany

Massively parallel processor array architectures can be used as hardware accelerators for a plenty of dataflow dominant applications. Bilateral filtering is an example of a state-of-the-art algorithm in medical imaging, which falls in the class of 2D adaptive filter algorithms. In this paper, we propose a semi-automatic mapping methodology for the generation of hardware accelerators for such a generic class of adaptive filtering applications in image processing. the final architecture deliver similar synthesis results as a hand-tuned design.

关键词： Design methodology Hardware Acceleration Adaptive filters Image processing Signal processing algorithms Biomedical imaging Field programmable gate arrays Medical diagnostic imaging Application software

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A demonstration case on the transformation of software architectures for service specification

A demonstration case on the transformation of software archi...

引用

5th IFIP TC 10 Working conference on Distributed and parallel Embedded Systems, DIPES 2006

作者： Fernandes, João M. Machado, Ricardo J. Monteiro, Paula Rodrigues, Helena Dept. Informática Universidade do Minho Braga - Guimarães Portugal Dept. Sistemas de Informação Universidade do Minho Braga - Guimarães Portugal

ISBN: (纸本)9780387393612

this paper presents a demonstration case on the successive application of a model-based technique to assist on the refinement of software logical architectures. the technique is essentially based on the transformation of use cases into object diagrams. the applicability of the technique is illustrated by presenting some results from a mobile application. For mobile software, the definition of the underlying service-oriented architecture must consider as user requirements the services themselves, the mobile operators entry points and the final clients interfaces, and use them to characterize the platform. Within the presented demonstration case, the specification of one service of the mobile application was obtained by successively applying the technique. © 2006 by international Federation for Information processing.

关键词： Demonstrations

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Exploration of Power Optimal Implementation Technique of 128-PT FFT/IFFT for WPAN using Pseudo-parallel Datapath Structure

Exploration of Power Optimal Implementation Technique of 128...

引用

international conference on Communication Systems

作者： J. Mathew K. Maharatna D. K. Pradhan A. P. Vinod MVB Bristol University of Bristol Bristol UK UK Nanyang Technological University Singapore

An optimal implementation of 128-Pt FFT/IFFT for low power IEEE 802.15.3a WPAN using pseudo-parallel datapath structure is presented, where the 128-Pt FFT is devolved into 8-Pt and 16-Pt FFTs and then once again by devolving the 16-Pt FFT into 4times4 and 2times8- We analyze 128-Pt FFT/IFFT architecture for various pseudo-parallel 8-Pt and 16-Pt FFTs and an optimum datapath architecture is explored. It is suggested that there exist an optimum degree of parallelism for the given algorithm. the analysis demonstrated that with modest increase in area one can achieve significant reduction in power. the proposed architectures complete one parallel-to-parallel (i.e., when all input data are available in parallel and all output data are generated in parallel) 128-point FFT computation in less than 312 ns and thereby meeting the standard specification. the relative merits and demerits of these architectures have been analyzed from the algorithm as well as implementation point of view. Detailed power analysis of each of the architectures with different number of data paths at block level is described. We found that from power perspective the architecture with eight datapaths is optimum. the core power consumption with optimum case is 60.6mw which is only less than half of the latest reported 128-point FFT design in 0.18u technology. Apart from the low power consumption, the advantages of the proposed architectures include reduced hardware complexity, regular data flow and simple counter based control

关键词： Computer architecture Energy consumption parallel processing Flexible printed circuits Physical layer Proposals Hardware Physics computing Concurrent computing Clocks

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Address Generation Techniques for Conflict Free parallel Memory Accessing in FFT architectures

Address Generation Techniques for Conflict Free Parallel Mem...

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13th IEEE international conference on Electronics, Circuits and Systems (ICECS'2006), vol.3

作者： D. Reisis N. Vlassopoulos Electronics Laboratory National and Kapodistrian University of Athens Athens Greece

Speeding up FFT computations is critical for today's real time systems targeting signal processing and telecommunication applications. Aiming at the performance improvement and the efficiency of FFT architectures this paper presents an address generation technique which enables a b-radix processing stage to access in parallel b memory banks without conflicts and leads to increasing the speedup of the algorithm by a factor of b. the address generation can be realized in each b-radix stage by the use of look up tables of size O(b{sup}2) bits. the proposed technique is cost efficient and leads to the design of FFT architectures of high speed and high sustained throughput.

关键词： Computer architecture Discrete Fourier transforms Signal processing algorithms Energy consumption throughput Delay Clocks Concurrent computing Frequency Fast Fourier transforms

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