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检索条件"任意字段=10th International Conference on Algorithms and Architectures for Parallel Processing"

共 2794 条记录，以下是441-450 订阅

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Distributing Sparse Matrix/Graph Applications in Heterogeneous Clusters - an Experimental Study

Distributing Sparse Matrix/Graph Applications in Heterogeneo...

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international conference on High Performance Computing

作者： Charilaos Tzovas Maria Predari Henning Meyerhenke Humboldt-Universität zu Berlin Berlin Germany

Many problems in scientific and engineering applications contain sparse matrices or graphs as main input objects, e.g., numerical simulations on meshes. Large inputs are abundant these days and require parallel processing for memory size and speed. To optimize the execution of such simulations on cluster systems, the input problem needs to be distributed suitably onto the processing units (PUs). More and more frequently, such clusters contain different CPUs or a combination of CPUs and GPUs. this heterogeneity makes the load distribution problem quite challenging. Our study is motivated by the observation that established partitioning tools do not handle such heterogeneous distribution problems as well as homogeneous ones. In this paper, we first formulate the problem of balanced load distribution for heterogeneous architectures as a multiobjective, single-constraint optimization problem. We then split the problem into two phases and propose a greedy approach to determine optimal block sizes for each PU. these block sizes are then fed into numerous existing graph partitioners, for us to examine how well they handle the above problem. One of the tools we consider is an extension of our own previous work (von Looz et al., ICPP'18) called Geographer. Our experiments on well-known benchmark meshes indicate that only two tools under consideration are able to yield good quality. these two are ParMetis (both the geometric and the combinatorial variant) and Geographer. While ParMetis is faster, Geographer yields better quality on average.

关键词： Greedy algorithms High performance computing Memory management Tools parallel processing Numerical simulation Numerical models

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A Spark-based Distributed Whale Optimization Algorithm for Feature Selection 10

A Spark-based Distributed Whale Optimization Algorithm for F...

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10th IEEE international conference on Intelligent Data Acquisition and Advanced Computing Systems - Technology and Applications (IDAACS)

作者： Chen, Hongwei Hu, Zhou Han, Lin Hou, Qiao Ye, Zhiwei Yuan, Jiansen Zeng, Jun Hubei Univ Technol Sch Comp Sci Wuhan 430068 Peoples R China Wuhan Fiberhome Tech Serv Co Ltd Wuhan 430074 Hubei Peoples R China

ISBN: (纸本)9781728140698

With the rapid development of the Internet and big data technologies, high-dimensional data generated in various fields has increased dramatically. Feature selection is an effective way to solve data processing problems caused by high dimensionality and high computational complexity. the traditional feature selection method shows the problem of insufficient classification accuracy and low processing efficiency when dealing with high-dimensional and large-scale data. the traditional feature selection method shows low classification accuracy and low processing efficiency when dealing with high-dimensional and large-scale data. this paper proposed a feature selection method based on Whale Optimization Algorithm to learn mining feature selection rules, then improve the accuracy of feature selection. However, when the data size is very large, the efficiency of single node execution is low. therefore, this paper combined the Whale Optimization Algorithm with the parallel computing model of the Spark platform, and proposed a feature selection method based on the Spark platform for distributed Whale Optimization Algorithm. the results showed that the excellent result search ability of the Whale Optimization Algorithm combined with the distributed and efficient calculation speed can realize the efficient solution of the feature selection optimization model.

关键词： feature selection Whale Optimization Algorithm Spark platform parallel computing

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One Table to Count them All: parallel Frequency Estimation on Single-Board Computers 25th

One Table to Count Them All: Parallel Frequency Estimation o...

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25th international conference on parallel and Distributed Computing (Euro-Par)

作者： Tasyaran, Fatih Yildirir, Kerem Tas, Mustafa Kemal Kaya, Kamer Sabanci Univ Istanbul Turkey

ISBN: (纸本)9783030294007;9783030293994

Sketches are probabilistic data structures that can provide approximate results within mathematically proven error bounds while using orders of magnitude less memory than traditional approaches. they are tailored for streaming data analysis on architectures even with limited memory such as single-board computers that are widely exploited for IoT and edge computing. Since these devices offer multiple cores, with efficient parallel sketching schemes, they are able to manage high volumes of data streams. However, since their caches are relatively small, a careful parallelization is required. In this work, we focus on the frequency estimation problem and evaluate the performance of a high-end server, a 4-core Raspberry Pi and an 8-core Odroid. As a sketch, we employed the widely used Count-Min Sketch. To hash the stream in parallel and in a cache-friendly way, we applied a novel tabulation approach and rearranged the auxiliary tables into a single one. To parallelize the process with performance, we modified the workflow and applied a form of buffering between hash computations and sketch updates. Today, many single-board computers have heterogeneous processors in which slow and fast cores are equipped together. To utilize all these cores to their full potential, we proposed a dynamic load-balancing mechanism which significantly increased the performance of frequency estimation.

关键词： parallel algorithms Streaming data Single board computers

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processing Millions of Single Cells by SHARP 20

Processing Millions of Single Cells by SHARP

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11th ACM conference on Bioinformatics, Computational Biology, and Health Informatics (ACM-BCB)

作者： Wan, Shibiao Kim, Junil Fan, Yiping Won, Kyoung Jae St Jude Childrens Res Hosp Ctr Appl Bioinformat 332 N Lauderdale St Memphis TN 38105 USA Univ Copenhagen Biotech Res & Innovat Ctr Copenhagen Denmark

ISBN: (纸本)9781450379649

Single-cell technologies have received extensive attention from bioinformatics and computational biology communities due to their evolutionary impacts on uncovering novel cell types and intra-population heterogeneity in various domains of biology and medicine. Recent advances on single-cell RNA-sequencing (scRNA-seq) technologies have enabled parallel transcriptomic profiling of millions of cells. However, existing scRNA-seq clustering methods are lack of scalability, time-consuming and prone to information loss during dimension reduction. To address these concerns, we present SHARP [1], an ensemble random projection-based algorithm which is scalable to clustering 10 million cells. By adopting a divide-and-conquer strategy, a sparse random projection and two-layer meta-clustering, SHARP has the following advantages: (1) hyper-faster than existing algorithms;(2) scalable to 10-million cells;(3) accurate in terms of clustering performance;(4) preserving cell-to-cell distance during dimension reduction;and (5) robust to dropouts in scRNA-seq data. Comprehensive benchmarking tests on 20 scRNA-seq datasets demonstrate SHARP remarkably outperforms state-of-the-art methods in terms of speed and accuracy. To the best of our knowledge, SHARP is the only R-based tool that is scalable to clustering 10 million cells. With an avalanche of single cells in different tissues to be sequenced in multiple international projects like the Human Cell Atlas, we believe SHARP will serve as one of the useful and important tools for large-scale single-cell data analysis. Several potential future directions include while keeping the scalability and speed of SHARP, how to extend its functions into rare cell type detection and integrating single cell data from different platforms, experiments and conditions.

关键词： Single cell analysis 10 million cells random projection dimension reduction clustering

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Task-DAG Support in Single-Source PHAST Library: Enabling Flexible Assignment of Tasks to CPUs and GPUs in Heterogeneous architectures 10

Task-DAG Support in Single-Source PHAST Library: Enabling Fl...

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10th international Workshop on Programming Models and Applications for Multicores and Manycores (PMAM)

作者： Peccerillo, Biagio Bartolini, Sandro Univ Siena Dept Informat Engn & Math Sci Siena Italy

ISBN: (纸本)9781450362900

Nowadays, the majority of desktop, mobile, and embedded devices in the consumer and industrial markets are heterogeneous, as they contain at least multi-core CPU and GPU resources in the same However, exploiting the performance and energy-efficiency of these diverse processing elements does not come for free from a software point of view: programmers need to a) code each activity through the specific approaches, libraries, and frameworks suitable for their target architecture (e.g., CPUs and GPUs) along with the orchestration of such heterogeneous execution, and b) decide the distribution of sequential and parallel activities towards the different parallel hardware resources available. Current frameworks typically provide either low-abstraction-level target-specific and/or generic but not high-performance in terfaces, which complicate the exploration of different task assignments, with DAG(1) precedence relationship, to the available heterogeneous resources. To enable this, tasks would typically need to be coded one time for each target architecture due to the profound differences in their programming. In this work, we include the support of tasks and DAGs of data-parallel tasks within the single-source PHAST library, which currently supports both multi-core CPUs and NVIDIA GPUs, so that tasks are coded in a target-agnostic fashion and their targeting to multi-core or GPU architectures is automatic and efficient. the integration of this coding approach with tasks can help to postpone the choice of the execution platform for each task up to the testing, or even to the runtime, phase. Finally, we demonstrate the effects of this approach in the case of a sample image pipeline benchmark from the computer vision domain. We compare our implementation to a SYCL implementation from a productivity point of view. Also, we show that various task assignments can be seamlessly explored by implementing both the PEFT2 mapping technique along with an exhaustive search in the mappin

关键词： Heterogeneous computing data-parallelism single-source parallel programming design-space exploration task-based applications

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parallel processing Implement Construction of Target Echo Simulation Based on Real Track 6th

Parallel Processing Implement Construction of Target Echo Si...

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6th international conference on Communications, Signal processing, and Systems (ICCSPS)

作者： Hu, Min Yan, Shibo Yang, Qiang Harbin Inst Technol Inst Elect Engn Technol Harbin Heilongjiang Peoples R China

ISBN: (纸本)9789811065712;9789811065705

In order to produce large amounts of timeliness data rapidly and simulate the echo signals effectively, this paper proposes a digital reconstruction model which uses real track information extracted from Google Earth route to construct the echo and utilizes the corresponding processing algorithms to realize the track. Due to the time of the original CPU platform producing the same amount of echo signal data is an extremely protracted process, the method of applying high-speed parallel capabilities of the Graphics processing Unit (GPU) based on the CUDA platform to participate in echo reconstruction and track simulation is presented to improve the operating speed. Comparing the real track with which obtained by the echo simulator, the results not only verify the validity and consistency of the two processing algorithms based on the real track reconstruction of Google Earth, but prove the fast floating-point computing capability of GPU whose power has great advantages of enhancing the performance of simulated echo signals and echo signal simulation algorithms.

关键词： Google Earth Real track Echo simulator GPU

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Porting CUDA-Based Molecular Dynamics algorithms to AMD ROCm Platform Using HIP Framework: Performance Analysis 5th

Porting CUDA-Based Molecular Dynamics Algorithms to AMD ROCm...

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5th Russian Supercomputing Days conference (RuSCDays)

作者： Kuznetsov, Evgeny Stegailov, Vladimir Natl Res Univ Higher Sch Econ Moscow Russia Joint Inst High Temp RAS Moscow Russia Moscow Inst Phys & Technol Dolgoprudnyi Russia

ISBN: (纸本)9783030365929;9783030365912

the use of graphics processing units (GPU) in computer data processing tasks has long ceased to be an unusual event. However, now GPU computing is nearly synonymous with CUDA, a proprietary framework for developing applications for Nvidia's GPU devices. It provides comprehensive documentation and excellent development tools. Meanwhile, the main competitor of Nvidia in the market for the production of GPU devices, the AMD company is developing its own Radeon Open Compute (ROCm) platform that features an application programming interface compatible with CUDA. the primary objective of this work is to investigate whether ROCm provides a worthy alternative to CUDA in the field of GPU computing. the work has two sub-objectives: the description of the programmers experience investigation during porting classical molecular dynamics algorithms from CUDA to ROCm platform and performance benchmarking of initial and resulting programs on GPU devices with modern architectures (Pascal, Vega10, Vega20).

关键词： GPU computing parallel computing CUDA ROCm Molecular dynamics

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A Feature Selection Method of parallel Grey Wolf Optimization Algorithm Based on Spark 10

A Feature Selection Method of Parallel Grey Wolf Optimizatio...

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10th IEEE international conference on Intelligent Data Acquisition and Advanced Computing Systems - Technology and Applications (IDAACS)

作者： Chen, Hongwei Han, Lin Hu, Zhou Hou, Qiao Ye, Zhiwei Zeng, Jun Yuan, Jiansen Hubei Univ Technol Sch Comp Sci Wuhan 430068 Peoples R China Wuhan Fiberhome Tech Serv Co Ltd Wuhan 430074 Peoples R China

ISBN: (纸本)9781728140698

Feature selection is a technique for selecting a set of related features that contribute the most to the accuracy of the classifier from the feature set. Feature selection has always been an active research field in the past ten to fifteen years. Due to a large amount of data and the high computational complexity caused by the high dimensionality of data, the single-machine processing time is too long. To address this shortcoming, this paper proposes a Spark-based platform. the feature selection method of the parallel binary gray wolf optimization algorithm (SPBGWO) has higher search performance, which can improve the shortcomings of the algorithm which is easy to fall into local optimum and improve the convergence efficiency of the algorithm. Combining the improved search capabilities of the improved gray wolf algorithm with the computing power of the Spark platform simplifies the high complexity of large data volumes and computations, making the algorithm simpler, faster, better able to solve problems and reduce storage requirements.

关键词： gwo spark spbgwo classification feature select

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How Does Connected Components Labeling with Decision Trees Perform on GPUs? 18th

How Does Connected Components Labeling with Decision Trees P...

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18th international conference on Computer Analysis of Images and Patterns (CAIP)

作者： Allegretti, Stefano Bolelli, Federico Cancilla, Michele Pollastri, Federico Canalini, Laura Grana, Costantino Univ Modena & Reggio Emilia Dipartimento Ingn Enzo Ferrari Via Vivarelli 10 I-41125 Modena MO Italy

ISBN: (纸本)9783030298883;9783030298876

In this paper the problem of Connected Components Labeling (CCL) in binary images using Graphic processing Units (GPUs) is tackled by a different perspective. In the last decade, many novel algorithms have been released, specifically designed for GPUs. Because CCL literature concerning sequential algorithms is very rich, and includes many efficient solutions, designers of parallel algorithms were often inspired by techniques that had already proved successful in a sequential environment, such as the Union-Find paradigm for solving equivalences between provisional labels. However, the use of decision trees to minimize memory accesses, which is one of the main feature of the best performing sequential algorithms, was never taken into account when designing parallel CCL solutions. In fact, branches in the code tend to cause thread divergence, which usually leads to inefficiency. Anyway, this consideration does not necessarily apply to every possible scenario. Are we sure that the advantages of decision trees do not compensate for the cost of thread divergence? In order to answer this question, we chose three well-known sequential CCL algorithms, which employ decision trees as the cornerstone of their strategy, and we built a data-parallel version of each of them. Experimental tests on real case datasets show that, in most cases, these solutions outperform state-of-the-art algorithms, thus demonstrating the effectiveness of decision trees also in a parallel environment.

关键词： Image processing Connected components labeling parallel computing GPU

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Modern Code Applied in Stencil in Edge Detection of an Image for Architecture Intel Xeon Phi KNL 5th

Modern Code Applied in Stencil in Edge Detection of an Image...

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5th international conference on Technologies and Innovation (CITI)

作者： Hernandez-Hernandez, Mario Luis Hernandez-Hernandez, Jose Rodriguez Maldonado, Edilia Herrera Miranda, Israel Autonomous Univ Guerrero Engn Fac Chilpancingo Mexico TecNM Technol Inst Chilpancingo Chilpancingo Mexico Autonomous Univ Guerrero Govt & Publ Management Fac Chilpancingo Mexico

ISBN: (纸本)9783030349899;9783030349882

Modern, high-performance computers are built with a combination of heterogeneous resources, including multi-core and many cores processors, large cache, fast memory, mesh communication between large processes bandwidth, as well as high support for Input/Output capabilities. In order to achieve the best hardware results it is necessary to design highly-performance parallel software with faster modern code that could take full advantage of the vast amount of resources of today's modern machines. Code modernization encompasses a wide range of activities that aim to improve the performance of highly parallel software. Code modernization is an issue that is being discussed more and more in the field of parallel software development. In this context, the experimentation with Stencil codes through a series of strategies for reorganizing code and algorithms, has shown to increase thread parallelism, vector/SIMD operations and compute intensity in modern architectures. For example, with the use of Stencil codes we have achieved a better performance in image edge detection by a factor of three faster than we could achieved with a standard processor.

关键词： Modern code Stencil Edge detection KNL Image processing

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