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检索条件"任意字段=10th International Conference on Algorithms and Architectures for Parallel Processing"

共 2804 条记录，以下是571-580 订阅

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TAMM: A New Topology-Aware Mapping Method for parallel Applications on the Tianhe-2A Supercomputer 18th

TAMM: A New Topology-Aware Mapping Method for Parallel Appli...

引用

18th international conference on algorithms and architectures for parallel processing (ICA3PP)

作者： Chen, Xinhai Liu, Jie Li, Shengguo Xie, Peizhen Chi, Lihua Wang, Qinglin Natl Univ Def Technol Sci & Technol Parallel & Distributed Proc Lab Changsha 410073 Peoples R China Hunan Inst Traff Engn Inst Adv Sci & Technol Hengyang 421001 Peoples R China

ISBN: (纸本)9783030050511;9783030050504

With the increasing size of high performance computing systems, the expensive communication overhead between processors has become a key factor leading to the performance bottleneck. However, default process-to-processor mapping strategies do not take into account the topology of the interconnection network, and thus the distance spanned by communication messages may be particularly far. In order to enhance the communication locality, we propose a new topology-aware mapping method called TAMM. By generating an accurate description of the communication pattern and network topology, TAMM employs a two-step optimization strategy to obtain an efficient mapping solution for various parallel applications. this strategy first extracts an appropriate subset of all idle computing resources on the underlying system and then constructs an optimized one-to-one mapping with a refined iterative algorithm. Experimental results demonstrate that TAMM can effectively improve the communication performance on the Tianhe-2A supercomputer.

关键词： High performance computing systems Topology-aware mapping Communication pattern Network topology

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Research on Consensus Efficiency Based on Practical Byzantine Fault Tolerance 10

Research on Consensus Efficiency Based on Practical Byzantin...

引用

10th international conference on Modelling, Identification and Control (ICMIC)

作者： Zhang, Li Li, Qinwei Guizhou Univ Coll Comp Sci & Technol Guiyang 550025 Peoples R China Guizhou Prov Key Lab Publ Big Data Guiyang 550025 Peoples R China

ISBN: (纸本)9781538654163

Byzantine Fault Tolerance (BFT) will be increasingly important to provide reliability in distributed systems and various Byzantine fault-tolerant algorithms have been proposed to improve efficiency. However, the practicality of BFT is still limited by its cost of consensus. Practical Byzantine Fault Tolerance (PBFT) is one of the best algorithms used in reality. Confronted with a distributed system with numerous nodes, PBFT is not satisfying. In order to improve the consensus efficiency, a new algorithm named Group-Hierarchy (GH) based on PBFT is proposed in this article. GH divides all replicas in a distributed system into several groups and every group has a primary. Replicas in a group reach an agreement respectively, which is called Local Consensus. And primaries of all the groups also reach a consensus based on the Local Consensus, which is called Global Consensus. After the Local Consensus and Global Consensus, replicas could reply to client. GH correlates the message complexity to the number of replicas and the number of groups in a distributed system in theory. the message complexity of GH is lower than PBFT in theory and the performed tests show that GH can execute a request even several times faster than PBFT.

关键词： Practical Byzantine Fault Tolerance Distributed systems parallel processing Consensus

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parallel Statistical and Machine Learning Methods for Estimation of Physical Load 18th

Parallel Statistical and Machine Learning Methods for Estima...

引用

18th international conference on algorithms and architectures for parallel processing (ICA3PP)

作者： Stirenko, Sergii Gang, Peng Zeng, Wei Gordienko, Yuri Alienin, Oleg Rokovyi, Oleksandr Gordienko, Nikita Pavliuchenko, Ivan Rojbi, Anis Natl Tech Univ Ukraine Igor Sikorsky Kyiv Polytech Inst Kiev Ukraine Huizhou Univ Huizhou Peoples R China Univ Paris 08 CHArt Lab Human & Artificial Cognit Paris France

ISBN: (纸本)9783030050511;9783030050504

Several statistical and machine learning methods are proposed to estimate the type and intensity of physical load and accumulated fatigue. they are based on the statistical analysis of accumulated and moving window data subsets with construction of a kurtosis-skewness diagram. this approach was applied to the data gathered by the wearable heart monitor for various types and levels of physical activities, and for people with various physical conditions. the different levels of physical activities, loads, and fitness can be distinguished from the kurtosis-skewness diagram, and their evolution can be monitored. Several metrics for estimation of the instant effect and accumulated effect (physical fatigue) of physical loads were proposed. the data and results presented allow to extend application of these methods for modeling and characterization of complex human activity patterns, for example, to estimate the actual and accumulated physical load and fatigue, model the potential dangerous development, and give cautions and advice in real time.

关键词： Statistical analysis Physiological signals Heart beat Classification Machine learning HCI and human behaviour

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Adaptive Data Sampling Mechanism for Process Object 18th

Adaptive Data Sampling Mechanism for Process Object

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18th international conference on algorithms and architectures for parallel processing (ICA3PP)

作者： Lin, Yongzheng Liu, Hong Chen, Zhenxiang Zhang, Kun Ma, Kun Shandong Normal Univ Sch Informat Sci & Engn Jinan Peoples R China Shandong Prov Key Lab Novel Distributed Comp Soft Jinan Peoples R China Univ Jinan Sch Informat Sci & Engn Jinan Peoples R China

ISBN: (纸本)9783030050511;9783030050504

Process object is the abstraction of process. In process object, there are different type of entities and associations. the entities vary dependent on other entities. the performance and evolution of process object are affected by the association between entities. these changes could be reflected in the data collected from the process objects. these data from process object could be regard as big data stream. In the context of big data, how to find appropriate data for process object is a challenge. the data sampling should reflect the performance change of process object, and should be adaptive to the current underlying distribution of data in data stream. For finding appropriate data in big data stream to model process object, an adaptive data sampling mechanism is proposed in this paper. Experiments demonstrate the effectiveness of the proposed adaptive data sampling mechanism for process object.

关键词： Process object Data sampling Big data Data stream Clustering Stream processing

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High-throughput VLSI architectures for CRC-16 Computation in VLSI Signal processing 1

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international conference on Microelectronics, Electromagnetics and Telecommunications, ICMEET 2017

作者： Ashok Chaitanya Varma, R. Apparao, Y.V. Department of ECE Shri Vishnu Engineering College for Women Bhimavaram India Department of ECE GITAM University Visakhapatnam India

ISBN: (数字)9789811073298

ISBN: (纸本)9789811073281

the intent of this paper is to design VLSI architectures for different CRC polynomial equations to achieve high throughput and low latency using DSP algorithms for signal processing. these architectures for CRC polynomials are designed using different techniques such a serial architecture, combined pipelining and parallelism, retiming technique, unfolding technique, and folding transformation. Linear Feedback Shift Register (LFSR) is an important component used in designing these architectures. A new formulation IIR filter-based design is proposed for designing these serial and parallel architectures using LFSR. In this paper, serial architectures, different levels of parallelism like one-level parallelism, two-level parallelisms, and three-level parallelisms are proposed for CRC-16 polynomial equation. Comparison is done between throughput and latency for different CRC polynomials for serial architectures and different levels of parallelism architectures. these architectures are designed and implemented in Verilog language and synthesized using Xilinx tool, cadence tool, etc. © Springer Nature Singapore Pte Ltd. 2018.

关键词： parallel architectures

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Acceleration of an Adaptive Cartesian Mesh CFD Solver in the Current Generation Processor architectures 25

Acceleration of an Adaptive Cartesian Mesh CFD Solver in the...

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25th IEEE international conference on High Performance Computing, Data and Analytics (HiPC)

作者： Harichand, M., V Sharma, Bharatkumar Sudhakaran, G. Ashok, V. Vikram Sarabhai Space Ctr Aeronaut Entity Thiruvananthapuram Kerala India Nvidia Graph Pvt Ltd Bengaluru India

ISBN: (纸本)9781538683866

In this paper, the challenges involved in the acceleration of an adaptive Cartesian Mesh CFD Solver PARAS-3D in the current generation processors(CPUs & GPUs) is explored. CFD codes are known for their memory-bound nature, which remains as a significant bottle-neck in achieving higher performance. Adaptive Cartesian meshes with their oct-tree structure brings about more challenges in data parallelism. Moreover, Cartesian mesh solvers have higher memory bandwidth requirements due to their larger and varying stencil. the paper will detail how a re-design and implementation of a legacy Cartesian mesh CFD solver helped in achieving higher performance in CPUs by improvements in algorithms and data structures. Moreover, very good scalability to thousands of cores was achieved using asynchronous communication and weighted graph partitioning. A Structure of Array based data layout along with GPU features like Unified memory and Multi Process Service was used in the GPU acceleration process to obtain a performance of 4.4 X on top of the CPU only version by using nVidia Quadro GV100 GPUs.

关键词： Computational Fluid Dynamics OpenACC Graphics processing Units parallel processing Compute Unified Device Architecture(CUDA) Cartesian Mesh AMR

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parallel Deblocking Filtering Algorithm on GPU 10

Parallel Deblocking Filtering Algorithm on GPU

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10th international conference on Digital Image processing (ICDIP)

作者： Qian, Zhou Jiao, Long Hao, Zhang Lei, Lei Zhang, Jiashu Guizhou Power Grid Commun Equipment Co Ltd Elect Power Dispatching Control Ctr Guiyang 550002 Guizhou Peoples R China Southwest Jiaotong Univ Sch Informat Sci & Engn Chengdu Sichuan Peoples R China

ISBN: (数字)9781510622005

ISBN: (纸本)9781510622005

In this paper, a parallel loop filtering algorithm based on GPU is proposed to accelerate the processing speed for the loop filter module in H.264/AVC protocol. By analyzing the process of two edges are filtering in parallel, this paper proposed a method that changes the boundary strength to make the calculation of deblocking filter adapt to the GPU hardware. through mapping the deblocking filter onto CUDA threads, this algorithm is able to complete the deblocking filter operation once for all. the experiment shows that the proposed algorithm has little loss on the PSNR of image while the acceleration of HD video can be up to 400%.

关键词： H.264 decoder Deblocking filter CUDA GPU

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A Feature Selection Method of parallel Grey Wolf Optimization Algorithm Based on Spark

A Feature Selection Method of Parallel Grey Wolf Optimizatio...

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IEEE international Workshop on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications

作者： Hongwei Chen Lin Han Zhou Hu Qiao Hou Zhiwei Ye Jun Zeng Jiansen Yuan School of Computer Science Hubei University of Technology Wuhan China Wuhan Fiberhome Technical Services Co. Ltd. Wuhan

Feature selection is a technique for selecting a set of related features that contribute the most to the accuracy of the classifier from the feature set. Feature selection has always been an active research field in the past ten to fifteen years. Due to a large amount of data and the high computational complexity caused by the high dimensionality of data, the single-machine processing time is too long. To address this shortcoming, this paper proposes a Spark-based platform. the feature selection method of the parallel binary gray wolf optimization algorithm (SPBGWO) has higher search performance, which can improve the shortcomings of the algorithm which is easy to fall into local optimum and improve the convergence efficiency of the algorithm. Combining the improved search capabilities of the improved gray wolf algorithm with the computing power of the Spark platform simplifies the high complexity of large data volumes and computations, making the algorithm simpler, faster, better able to solve problems and reduce storage requirements.

关键词： Xenon

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parallel and Pipelined CMA for High-Speed and Real-Time Optical Coherent Receivers

Parallel and Pipelined CMA for High-Speed and Real-Time Opti...

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international conference on Optical Communications and Networks (ICOCN)

作者： Yue Dong Liqian Wang Zhiguo Zhang Shanyong Cai Luming Li Jiangxing Chen Xing Liu State Key Laboratory of Information Photonics and Optical Communications Beijing University of Posts and Telecommunications Beijing China Information and Communications Branch Jiangxi Electric Power Company Nanchang China

In order to reduce the logic resources required by parallel polarization demultiplexing algorithm, an improvement scheme based on parallel structure of constant mode algorithm (PCMA) was proposed in this paper. We designed a new error accumulation method in this improvement scheme. After that, we make a simulation of our algorithm at a data rate of 10-Gb/s. the simulation results show that the optimized algorithm can accelerate the convergence speed and reduce the steady-state mean square error (MSE) and bit error rate (BER).

关键词： Signal processing algorithms Convergence Optical receivers Optical fiber communication Adaptive optics Optical polarization

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Research on Overload Classification Method for Bus Images Based on Image processing and SVM 18th

Research on Overload Classification Method for Bus Images Ba...

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18th international conference on algorithms and architectures for parallel processing (ICA3PP)

作者： Li, Tingting Sun, Yongxiong Liang, Yanhua Zhai, Yujia Ji, Xuan Jilin Univ Coll Software Changchun 130012 Peoples R China Jilin Univ Coll Comp Sci & Technol Changchun 130012 Peoples R China

ISBN: (纸本)9783030050573;9783030050566

the speed and efficiency of overloaded artificial screening bus images are relatively low, which results in a large number of human resources waste problems. therefore, an overload classification method for bus images based on image processing and support vector machine was proposed to intelligently identify the image overload or not. Based on the consideration we have done the following work. Firstly, the bus images were preprocessed, including image enhancement using histogram equalization method and image segmentation using improved Otsu algorithm;Secondly, the features of the segmented images was extracted by Kirsch edge detection operator to establish the image feature sample library;Finally, the appropriate kernel function and parameters were chosen to establish a classifier model based on support vector machine, which can train the sample library to classify the bus images. theoretical analysis and experimental results show that the average classification accuracy of the polynomial kernel function is better than those of the Gaussian kernel function and the Sigmoid kernel function in the finite range of parameters selection. When the parameter d of the polynomial kernel function is 4, the classification accuracy is 93.68%, and its classification performance is stable and there is no significant increase or fall. And the conclusion was verified in the actual application.

关键词： Bus overload Image segmentation Image feature extraction Support vector machine Image classification

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