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检索条件"任意字段=10th International Conference on Algorithms and Architectures for Parallel Processing"

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Memory Bandwidth Contention: Communication vs Computation Tradeoffs in Supercomputers with Multicore architectures 24

Memory Bandwidth Contention: Communication vs Computation Tr...

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24th IEEE international conference on parallel and Distributed Systems (ICPADS)

作者： Langguth, Johannes Cai, Xing Sourouri, Mohammed Simula Res Lab Dept High Performance Comp Oslo Norway Acando Norway Oslo Norway

ISBN: (纸本)9781538673089

We study the problem of contention for memory bandwidth between computation and communication in super-computers that feature multicore CPUs. the problem arises when communication and computation are overlapped, and both operations compete for the same memory bandwidth. this contention is most visible at the limits of scalability, when communication and computation take similar amounts of time, and thus must be taken into account in order to reach maximum scalability in memory bandwidth bound applications. Typical examples of codes affected by the memory bandwidth contention problem are sparse matrix-vector computations, graph algorithms, and many machine learning problems, as they typically exhibit a high demand for both memory bandwidth and inter-node communication, while performing a relatively low number of arithmetic operations. the problem is even more relevant in truly heterogeneous computations where CPUs and accelerators are used in concert. In that case it can lead to mispredictions of expected performance and consequently to suboptimal load balancing between CPU and accelerator, which in turn can lead to idling of powerful accelerators and thus to a large decrease in performance. We propose a simple benchmark in order to quantify the loss of performance due to memory bandwidth contention. Based on that, we derive a theoretical model to determine the impact of the phenomenon on parallel memory-bound applications. We test the model on scientific computations, discuss the practical relevance of the problem and suggest possible techniques to remedy it.

关键词： Bandwidth Multicore processing Benchmark testing Message systems Computational modeling Sockets Instruction sets

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More Effective Distributed Deep Learning Using Staleness Based Parameter Updating 18th

More Effective Distributed Deep Learning Using Staleness Bas...

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18th international conference on algorithms and architectures for parallel processing (ICA3PP)

作者： Ye, Yan Chen, Mengqiang Yan, Zijie Wu, Weigang Xiao, Nong Sun Yet Sen Univ Sch Data & Comp Sci Guangzhou Peoples R China Guangdong Prov Key Lab Big Data Anal & Proc Guangzhou Peoples R China MoE Key Lab Machine Intelligence & Adv Comp Guangzhou Peoples R China

ISBN: (纸本)9783030050542;9783030050535

Deep learning technology has been widely applied for various purposes, especially big data analysis. However, computation required for deep learning is getting more complex and larger. In order to accelerate the training of large-scale deep networks, various distributed parallel training protocols have been proposed. In this paper, we design a novel asynchronous training protocol, Weighted Asynchronous parallel (WASP), to update neural network parameters in a more effective way. the core of WASP is "gradient staleness", a parameter version number based metric to weight gradients and reduce the influence of the stale parameters. Moreover, by periodic forced synchronization of parameters, WASP combines the advantages of synchronous and asynchronous training models and can speed up training with a rapid convergence rate. We conduct experiments using two classical convolutional neural networks, LeNet-5 and ResNet-101, at the Tianhe-2 supercomputing system, and the results show that, WASP can achieve much higher acceleration than existing asynchronous parallel training protocols.

关键词： Distributed deep learning parallel computing Parameter server Asynchronous parallel Supercomputing system

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Combining Gated Recurrent Unit and Attention Pooling for Sentimental Classification 18

Combining Gated Recurrent Unit and Attention Pooling for Sen...

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2nd international conference on Computer Science and Artificial Intelligence (CSAI) / 10th international conference on Information and Multimedia Technology (ICIMT)

作者： Hong, Mingbo Wang, Mantao Luo, Lixin Tan, Xuefeng Zhang, Dejun Lao, Yike Sichuan Agr Univ Coll Informat & Engn Yaan 625014 Peoples R China China Univ Geosci Fac Informat Engn Wuhan 430074 Hubei Peoples R China

ISBN: (纸本)9781450366069

Recurrent Neural Network (RNN) is one of the most popular architectures for addressing variable sequence text, and it shows outstanding results in many Natural Language processing (NLP) tasks and remarkable performance in capturing long-term dependencies. Many models have achieved excellent results based on RNN. However, most of these models ignored the locations of the crucial words in a sentence and the semantic connections in different directions. Such processing approaches do not make full use of the available information. thus, we consider that some words have a special effect on the whole sentence, while some words have little influence. To address these problems, in this paper, we propose Bidirectional Gated Recurrent Units (BGRU) that are integrated with a novel attention pooling that combine with max-pooling to pay attention to the crucial words and maintain the more meaningful representation of the text automatically, which allows us to encode longer sequences. It not only prevents important information from being discarded but also can be used to filter noise. We evaluate the proposed model on multiple tasks, including sentiment classification, movie review data and a subjective classification dataset. Our model compares predicted labels with correct labels as accuracy. the experimental results show that our model can achieve excellent performance on these tasks.

关键词： Natural language processing Neural Network Gated Recurrent Units Text Classification

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SPMP: A JavaScript Support for Shared Persistent Memory on *** 18th

SPMP: A JavaScript Support for Shared Persistent Memory on *...

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18th international conference on algorithms and architectures for parallel processing (ICA3PP)

作者： Zhang, Qipeng Li, Tianyou Deng, Pan Chen, Yuting Huang, Linpeng Rudoff, Andy Shanghai Jiao Tong Univ Shanghai Peoples R China Intel Asia Pacific R&D Co LTD Shanghai Peoples R China Intel Corp Santa Clara CA USA

ISBN: (纸本)9783030050542;9783030050535

JavaScript is widely used for scripting on client side. *** is a JavaScript runtime environment, allowing Javascript to be used for building scalable network applications on server side. However, *** does not support parallel programming, making it difficult to enhance applications' performance. Meanwhile, persistent memory (PM) shows optimistic prospects of being used in server-side applications, while few researches do exist in allowing script languages to support PM-based parallel programming. In this paper, we introduce SPMP, a JavaScript support for shared persistent memory on ***. With SPMP, each process needs to hold PersistentArrayBuffer, an object that is responsible for allocating, managing, and accessing persistent memory. Multiple processes can then share persistent memory and communicate each other by their PersistentArrayBuffer objects. Furthermore, SPMP supports dynamic load-balancing strategies and ensures data coherency, and also supports data persistence in a secondary storage. We have evaluated SPMP against Extended Memory Semantics (EMS, a state-of-the-art model for parallel programming on ***) on two data-intensive tasks. the results show that SPMP is 100 similar to 300x faster than EMS on five basic operations, and 2x faster on complicated parallel computing tasks such as counting words, due to its particular way on memory allocation and mapping.

关键词： Node.js parallel programming Shared persistent memory

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Development of Models in Resilient Computing

Development of Models in Resilient Computing

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IEEE international conference on Dependable Systems, Services and Technologies (DESSERT)

作者： Oleksandr Drozd Vyacheslav Kharchenko Andrzej Rucinski thaddeus Kochanski Raymond Garbos Dmitry Maevsky Odessa National Polytechnic University Odessa National Aerospace University Kharkiv Ukraine University of New Hampshire Boston USA eCollaborative Ventures (eCV) Collaboratory Boston USA

the article analyzes the concept of "Resilience" in relation to the development of computing. the strategy for reacting to perturbations in this process can be based either on "harsh Resistance" or "smarter Elasticity." Our "Models" are descriptive in defining the path of evolutionary development as structuring under the perturbations of the natural order and enable the analysis of the relationship among models, structures and factors of evolution. Among those, two features are critical: parallelism and "fuzziness", which to a large extent determine the rate of change of computing development, especially in critical applications. Both reversible and irreversible development processes related to elastic and resistant methods of problem solving are discussed. the sources of perturbations are located in vicinity of the resource boundaries, related to growing problem size with progress combined with the lack of computational "checkability" of resources i.e. data with inadequate models, methodologies and means. As a case study, the problem of hidden faults caused by the growth, the deficit of resources, and the checkability of digital circuits in critical applications is analyzed.

关键词： Perturbation methods Computational modeling Resistance Elasticity Circuit faults Biological system modeling parallel processing

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PLZMA: A parallel Data Compression Method for Cloud Computing 18th

PLZMA: A Parallel Data Compression Method for Cloud Computin...

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18th international conference on algorithms and architectures for parallel processing (ICA3PP)

作者： Wang, Xin Gan, Lin Xu, Jingheng Yang, Jinzhe Xia, Maocai Fu, Haohuan Huang, Xiaomeng Yang, Guangwen Tsinghua Univ Dept Comp Sci & Technol Beijing Peoples R China Tsinghua Univ Key Lab Earth Syst Modeling Minist Educ Beijing Peoples R China Tsinghua Univ Dept Earth Syst Sci Beijing Peoples R China Natl Supercomp Ctr Wuxi Jiangsu Peoples R China Imperial Coll London Dept Comp London England Qingdao Natl Lab Marine Sci & Technol Lab Reg Oceanog & Numer Modeling Qingdao Peoples R China

ISBN: (纸本)9783030050573;9783030050566

Recent decades have seen the rapid development of cloud computing, resulting in a huge breakthrough for people to handle the data produced every second and everywhere. Meanwhile, data compression is becoming increasingly important, due to its great potential in benefiting both the network transportation and the storage. Based on the urgent demand in high-efficient compression method with balanced performance in both merits of compression time and ratio, this paper presents PLZMA, a parallel design of LZMA. Process-level and thread-level parallelisms are implemented according to the algorithm of LZMA, which have gained great improvement in compression time, while ensuring a fair compression ratio. Experimental results on real-world application showed that PLZMA is able to achieve more balanced performance over other famous methods. the parallel design is able to achieve a performance speedup of 8x over the serial baseline, using 12 threads.

关键词： Data compression parallel computing LZMA

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Design Methodology of Bidirectional Flyback Converter for Differential Power processing Modules in PV Applications

Design Methodology of Bidirectional Flyback Converter for Di...

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international conference on Power Electronics (ICPE)

作者： Seungbin Park Mina Kim Hoejeong Jeong Katherine A. Kim Taewon Kim A-Rong Kim Jee-Hoon Jung School of Electrical and Computer Engineering Ulsan National Institute of Science and Technology Ulsan Korea LG Electronics Seoul Korea Department of Electrical Engineering National Taiwan University Taipei Taiwan Research Institute of Science and Technology Pohang Korea

ISBN: (纸本)9781728116129

A bidirectional flyback converter is a suitable topology for a PV-to-bus differential power processing (DPP) module in PV applications because of its electrical isolation capability, bidirectional power transfer, high step-up ratio, and simple circuit structure. Bidirectional flyback converters differ from the conventional flyback converters, which has power switches and snubber circuits on both the primary and secondary sides for bi-directional operations. the poor reverse recovery characteristics of the anti-parallel diode of the secondary (output) side power switch increase the switching loss and reduce the reliability. this paper proposes the design methodology of the bidirectional flyback converter for operating under the boundary conduction mode (BCM), which can show low power loss from the reverse recovery issue. the suitable magnetizing inductance is obtained by calculating the power losses in the bidirectional operation at the rated load. the validity of the proposed design methodology is verified using a 25.6-W bidirectional flyback converter prototype.

关键词： Buck converters Inductance Magnetic switching Power generation Snubbers Prototypes

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Towards Embedded Heterogeneous FPGA-GPU Smart Camera architectures for CNN Inference 2019

Towards Embedded Heterogeneous FPGA-GPU Smart Camera Archite...

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Proceedings of the 13th international conference on Distributed Smart Cameras

作者： Walther Carballo-Hernández François Berry Maxime Pelcat Miguel Arias-Estrada Department of Images Perception Systems and Robotics Institut Pascal Aubière France Department of Images Institut National des Sciences Appliquées (INSA) des Rennes IETR UMR CNRS Rennes France Department of Computer Science Instituto Nacional de Astrofísica (Óptica y Electrónica (INAOE) Puebla Mexico

ISBN: (纸本)9781450371896

the success of Deep Learning (DL) algorithms in computer vision tasks have created an on-going demand of dedicated hardware architectures that could keep up with the their required computation and memory complexities. this task is particularly challenging when embedded smart camera platforms have constrained resources such as power consumption, processing Element (PE) and communication. this article describes a heterogeneous system embedding an FPGA and a GPU for executing CNN inference for computer vision applications. the built system addresses some challenges of embedded CNN such as task and data partitioning, and workload balancing. the selected heterogeneous platform embeds an Nvidia® Jetson TX2 for the CPU-GPU side and an Intel Altera® Cyclone10GX for the FPGA side interconnected by PCIe Gen2 with a MIPI-CSI camera for prototyping. this test environment will be used as a support for future work on a methodology for optimized model partitioning.

关键词： Internet of things Field Programmable Gate Array (FPGA) Graphic processing Unit (GPU) Deep Learning (DL) Edge Computing processing Elements (PE) Artificial Neural Networks (ANN) Single Instruction Multiple Data Convolutional Neural Networks (CNN) Models of Computation and Architecture Pipelining Heterogeneous Computing parallel Programming

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Run-time Requirement Enforcement for Loop Programs on Processor Arrays 18

Run-time Requirement Enforcement for Loop Programs on Proces...

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16th ACM/IEEE international conference on Formal Methods and Models for System Design (MEMOCODE)

作者： Witterauf, Michael Teich, Juergen Friedrich Alexander Univ Erlangen Nurnberg FAU Dept Comp Sci Hardware Software Codesign Erlangen Germany

ISBN: (纸本)9781538661956

Loop bounds are often unknown until run time, making it difficult to analyze non-functional properties such as latency at compile-time. Similarly, static allocations of processing resources to loop computations might be too conservative with respect to given performance requirements, or not optimal with respect to the energy consumption. To still satisfy requirements when accelerating loop nests under this uncertainty of loop bounds, we formalize and propose an approach to run-time requirement enforcement: at run time, select a mapping among a set of candidates that satisfies a given set of requirements while optimizing secondary objectives. Because the candidate search space of suitable mappings might be prohibitively large to evaluate at run time, we further introduce two approaches to reduce its cardinality: 1) architecture-specific reduction by solving for parts of the mapping from the requirements, and 2) design-time reduction by finding a k-subset of mappings that maximizes the number of loop bounds where the requirements are satisfied. We implemented our proposed run-time requirement enforcement techniques for a representative class of programmable processor array architecture called tightly coupled processor arrays (TCPAs) and demonstrate their effectiveness with a case study. the case study shows the effectiveness of our approach: We can satisfy given latency requirements while easily saving up to 10% in energy.

关键词： embedded systems Linux multiprocessing systems parallel processing power aware computing program compilers program control structures reconfigurable architectures power aware computing program control structures Runtime Loops compilers Multiprocessing systems Reconfigurable architectures Contraceptive Coil Linux parallel processing (COMPUTERS) Embedded systems MAPPING(MAthEMATICAL) ARRAY PROCESSORS enforcement

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Design & Implementation of Real-time parallel Image processing Scheme on Fire-Control System 10

Design & Implementation of Real-time Parallel Image Processi...

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10th international conference on Ubiquitous and Future Networks (ICUFN)

作者： Moon, Chang Bae Kim, Byeong Man Kim, Dong-Seong Kumoh Natl Inst Technol ICT Convergence Res Ctr Gumi South Korea Kumoh Natl Inst Technol Dept Comp Software Engn Gumi South Korea Kumoh Natl Inst Technol Dept IT Convergence Engn Gumi South Korea

ISBN: (纸本)9781538646465

In this paper, a parallel image-processing method based on OpenMP is proposed for a software application in a firecontrol system(FCS). the proposed method for image-processing is composed of automatic and semi-manual detection methods respectively. In the automatic method, a target is detected automatically by the image-processing dynamically for moving target in CCD with IR for bright target. For the performance evaluation, the proposed method is compared with a CUDA and normal image processing. the simulation results show that, the proposed method has good performance in term of total image processing time in the FCS.

关键词： Fire-Control System Real-time parallel image processing Military Application CUDA OpenMP

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