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检索条件"任意字段=11th Asia-Pacific Conference on Advances in Computer Systems Architecture"

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advances in computer systems architecture - 11th asia-pacific conference, ACSAC 2006, Proceedings

Advances in Computer Systems Architecture - 11th Asia-Pacifi...

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11th asia-pacific conference on advances in computer systems architecture, ACSAC 2006

ISBN: (纸本)3540400567

the proceedings contain 63 papers. the topics discussed include: streaming networks for coordinating data-parallel programs;implementations of square-root and exponential functions for large FPGAs;scientific computing applications on the imagine stream processor;enhancing last-level cache performance by block bypassing an early miss determination;a study of the performance potential for dynamic instruction hints selection;processor directed dynamic page policy;trace-based data cache leakage reduction at link time;parallelizing user-defined and implicit reductions globally on multiprocessors;overload protection for commodity network appliances;an integrated temporal partitioning and mapping framework for handling custom instructions on a reconfigurable functional unit;a high performance simulator system for a multiprocessor system based on a multi-way cluster;and hardware budget and runtime system for data-driven multithreaded chip multiprocessor.

关键词： computer architecture

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advances in computer systems architecture : 9th asia-pacific conference, Acsac 2004, Beijing, China, September 7-9, 2004 : Proceedings

引用

2016年

作者： pen-chung yew

advances in computer systems architecture : 9th asia-pacific conference, Acsac 2004, Beijing, China, September 7-9, 2004 : Proceedings by Acsac 2004 (2004 : Beijing, China); Yew, Pen-Chung, 1950-; Xue, Jingling, 1962-... 详细信息

关键词： acsac advances architecture asia-pacific computer architecture

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advances in computer systems architecture - 10th asia-pacific conference, ACSAC 2005, Proceedings

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10th asia-pacific conference on advances in computer systems architecture, ACSAC 2005

ISBN: (纸本)3540296433

the proceedings contain 65 papers. the topics discussed include: efficient voltage scheduling and energy-aware co-synthesis for real-time embedded systems;energy-effective instruction fetch unit for wide issue processors;design of an multiplier-less architecture for multi-dimensional convolution;embedded intelligent imaging on-board small satellites;a power-efficient processor core for reactive embedded applications;a stream architecture supporting multiple stream execution models;modularized redundant parallel virtual file system;embedding of cycles in the faulty hypercube;a register allocation framework for banked register files with access constraints;and designing a concurrent hardware garbage collector for small embedded systems.

关键词： computer architecture

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advances in computer systems architecture - 12th asia-pacific conference, ACSAC 2007, Proceedings

Advances in Computer Systems Architecture - 12th Asia-Pacifi...

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12th asia-pacific computer systems architecture conference, ACSAC 2007

ISBN: (纸本)9783540743088

the proceedings contain 36 papers. the topics discussed include: a compiler framework for supporting speculative multicore processors;power-efficient heterogeneous multicore technology for digital convergence;starDBT: an efficient multi-platform dynamic binary translation system;unbiased branches: an open problem;an online profile guided optimization approach for speculative parrallel threading;entropy-based profile characterization and classification for automatic profile management;laplace transformation on the FT64 stream processor;towards data tiling for whole programs in scratchpad memory allocation;evolution of NAND flash memory interface;exploiting single-usage for effective memory management;an alternative organization of defect map for defect-resilient embedded on-chip memories;optimal placement of frequently accessed IPs in mesh NoCs;and an efficient link controller for test access to IP core-based embedded system chips.

关键词： computer architecture

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8th asia-pacific conference on advances in computer systems architecture, ACSAC 2003

8th Asia-Pacific Conference on Advances in Computer Systems ...

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8th asia-pacific conference on computer systems architecture, ACSAC 2003

ISBN: (纸本)9783540201229

the proceedings contain 31 papers. the special focus in this conference is on advances in computer systems architecture. the topics include: How can the earth simulator impact on human activities;toward architecting and designing novel computers;designing ultra-large instruction issue windows;the development of system software for parallel supercomputers;asynchronous bit-serial datapath for object-oriented reconfigurable architecture PCA;saviour for experimental computer architecture research;design and implementation of java processors;CPU architecture with memory protection and support for OOP;reducing access count to register-files through operand reuse;simple and readable alpha processor simulator;towards an asynchronous MIPS processor;on implementing high level concurrency in java;simultaneous multistreaming for complexity-effective VLIW architectures;a novel architecture for genomic sequence searching and alignment;a reconfigurable multi-threaded architecture model;reconfigurable instruction-level parallel processor architecture;mapping applications to a coarse grain reconfigurable system;packing with boundary constraints for a reconfigurable operating system;arithmetic circuits combining residue and signed-digit representations;a new on-the-fly summation algorithm;state reordering for low power combinational logic;user-level management of kernel memory;a page table for modern architectures;fast hardware support for fine-grained protection;exploiting data redundancy to reduce leakage energy in a cache subsystem;implementation of fast address-space switching and TLB sharing on the strong arm processor;performance of the achilles router;latency improvement in virtual multicasting and a router architecture to achieve link rate throughput in suburban ad-hoc networks.

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H4H: Hybrid Convolution-Transformer architecture Search for NPU-CIM Heterogeneous systems for AR/VR Applications 25

H4H: Hybrid Convolution-Transformer Architecture Search for ...

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30th asia and South pacific Design Automation conference, ASP-DAC 2025

作者： Zhao, Yiwei Chen, Jinhui Zhang, Sai Qian Sarwar, Syed Shakib Stangherlin, Kleber Hugo Gomez, Jorge Tomas Seo, Jae-Sun De Salvo, Barbara Liu, Chiao Gibbons, Phillip B. Li, Ziyun Carnegie Mellon Univ. PittsburghPA United States Reality Labs Research Meta RedmondWA United States New York Univ. New YorkNY United States

ISBN: (纸本)9798400706356

Low-latency and low-power edge AI is crucial for Augmented/Virtual Reality applications. Recent advances demonstrate that hybrid models, combining convolution layers (CNN) and transformers (ViT), often achieve a superior accuracy/performance tradeoff on various computer vision and machine learning (ML) tasks. However, hybrid ML models can present system challenges for latency and energy efficiency due to their diverse nature in dataflow and memory access patterns. In this work, we leverage architecture heterogeneity from Neural Processing Units (NPU) and Compute-In-Memory (CIM) and explore diverse execution schemas for efficient hybrid model executions. We introduce H4H-NAS, a two-stage Neural architecture Search (NAS) framework to automate the design of hybrid CNN/ViT models for heterogeneous edge systems featuring both NPU and CIM. We propose a two-phase incremental supernet training in our NAS to resolve gradient conflicts between sampled subnets caused by different block types in a hybrid model search space. Our H4H-NAS approach is also powered by a performance estimator built with NPU performance results measured on real silicon, and CIM performance based on industry IPs. H4H-NAS searches hybrid CNN-ViT models with fine granularity and achieves significant (up to 1.34%) top-1 accuracy improvement on ImageNet-1k. Moreover, results from our algorithm/hardware co-design reveal up to 56.08% overall latency and 41.72% energy improvements by introducing heterogeneous computing over baseline solutions. Overall, our framework guides the design of hybrid network architectures and system architectures for NPU+CIM heterogeneous systems. © 2025 Institute of Electrical and Electronics Engineers Inc.. All rights reserved.

关键词： Inference engines

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HCiM: ADC-Less Hybrid Analog-Digital Compute in Memory Accelerator for Deep Learning Workloads 25

HCiM: ADC-Less Hybrid Analog-Digital Compute in Memory Accel...

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30th asia and South pacific Design Automation conference, ASP-DAC 2025

作者： Negi, Shubham Saxena, Utkarsh Sharma, Deepika Roy, Kaushik Elmore Family School of Electrical and Computer Engineering Purdue Univ. West LafayetteIN47907 United States

ISBN: (纸本)9798400706356

Analog Compute-in-Memory (CiM) accelerators are increasingly recognized for their efficiency in accelerating Deep Neural Networks (DNNs). However, their dependence on Analog-to-Digital Converters (ADCs) for accumulating partial sums from crossbars leads to substantial power and area overhead. Moreover, the high area overhead of ADCs constrains throughput due to the limited number of ADCs that can be integrated per crossbar. To mitigate this issue, extreme low-precision quantization (binary or ternary) for partial sums can be adopted, eliminating the need for ADCs. While this strategy effectively reduces ADC costs, it introduces the challenge of managing numerous floating-point scale factors, which are trainable parameters like DNN weights. these scale factors must be multiplied with the binary or ternary outputs at the crossbar columns to maintain system accuracy, offsetting the benefits of CiM and partial sum quantization. To that effect, we propose an algorithm-hardware co-design approach. Initially, DNNs are trained with two-stage quantization-aware training. Subsequently, we introduce HCiM, an ADC-Less Hybrid Analog-Digital CiM accelerator. HCiM uses analog CiM crossbars for performing Matrix-Vector Multiplication operations, coupled with a digital CiM array for processing scale factors. Compared to an analog CiM baseline architecture using 7 and 2-bit ADCs, HCiM provides energy reductions up to 28× and 11×, respectively, with a minimal drop in accuracy. © 2025 Institute of Electrical and Electronics Engineers Inc.. All rights reserved.

关键词： Deep neural networks

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StreamTag: A Platform for Flexible Tagged Data Management 11

StreamTag: A Platform for Flexible Tagged Data Management

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11th International conference on Information and Communication Technologies for Ageing Well and e-Health, ICT4AWE 2025

作者： Díaz-Jiménez, David Mata-Mata, Francisco López, José L. Pérez-Cordón, Luis G. Serrano, José-María Martínez-Cruz, Carmen Morcillo-Martínez, Juana M. Verdejo-Espinosa, Ángeles Cuevas-Martínez, Juan C. Viciana-Abad, Raquel Reche-López, Pedro J. Pérez-Lorenzo, José M. Gaitán-Guerrero, Juan F. Espinilla, Macarena Department of Computer Science University of Jaén Jaén23071 Spain Department of Languages and Computer Systems University of Granada Granada18071 Spain Psycology Department Faculty of Social Work University of Jaén Jaén23071 Spain Electrical Engineering Department University of Jaén Jaén23071 Spain Telecommunication Engineering Department University of Jaén Jaén23071 Spain

ISBN: (纸本)9789897587436

this paper presents StreamTag, a platform designed for the efficient management of labeled data in healthcare environments, particularly for activity recognition systems in residential and nursing home settings. Human Activity Recognition (HAR) is crucial for monitoring patient behaviors and supporting personalized care, and this field has evolved significantly with advances in IoT and AI. StreamTag integrates a flexible data labeling structure and a modular architecture, enabling data collection, labeling, and secure management of activity data. the system leverages non-relational databases for scalable data handling, along with secure protocols to ensure data integrity and privacy. this work examines existing approaches in HAR, including data-driven, knowledge-based, and hybrid models, and situates StreamTag as a versatile solution that combines flexible user-controlled labeling with high adaptability for diverse healthcare contexts. Future directions are suggested for enhancing system functionality and integration with more advanced analytical tools. Copyright © 2025 by SCITEPRESS - Science and Technology Publications, Lda.

关键词： Information management

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Streaming networks for coordinating data-parallel programs (Position statement)

Streaming networks for coordinating data-parallel programs (...

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11th asia-pacific conference on advances in computer systems architecture

作者： Shafarenko, Alex Univ Hertfordshire Compiler Technol & Comp Architecture Grp Hatfield AL10 9AB Herts England

ISBN: (纸本)3540400567

A new coordination language for distributed data-parallel programs is presented, call SNet. the intention of SNet is to introduce advanced structuring techniques into a coordination language: stream processing and various forms of subtyping. the talk will present the organisation of SNet, its major type inferencing algorithms and will briefly discuss the current state of implementation and possible applications.

关键词： computer architecture

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A DDL-based software architecture model

A DDL-based software architecture model

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11th asia-pacific conference on advances in computer systems architecture

作者： Wang, Meiling Liu, Lei Jilin Univ Coll Comp Sci & Technol Minist Educ Key Lab Symbol Computat & Knowledge Engn Changchun 130012 Peoples R China

ISBN: (纸本)3540400567

Dynamic Description Logic (DDL) can support both the static and dynamic knowledge representation, thus this paper introduces a kind of Software architecture (SA) Model based on DDL, the purpose of which is to facilitate the description of each part of SA as well as the constraints between them. In addition, the model also supports the detection of the consistency problems existed in dynamic architecture. In the end, the mapping from SA to DLL is discussed, and an example of a complete architecture model of Pipeline-Filter style is described.

关键词： computer software

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