Standard distribution middleware has traditionally been perceived as complex software which is not suitable for satisfying the highest certification criteria in safety-critical environments. However, this idea is slow...
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ISBN:
(纸本)9798350387964;9798350387957
Standard distribution middleware has traditionally been perceived as complex software which is not suitable for satisfying the highest certification criteria in safety-critical environments. However, this idea is slowly changing and there are efforts such as the Future Airborne Capability Environment (FACE) consortium to integrate standard distribution middleware into the development of avionic systems. this integration facilitates the interoperability and portability of avionic applications, but there are still challenges that need to be addressed before full success can be achieved. To this end, this paper explores the usage of the Data Distribution Service for real-timesystems (DDS) on top of a partitioned system with a communication network based on the ARINC 664 specification (precisely, the AFDX network). this work specifically identifies the incompatibilities between the two standards and also proposes potential solutions. A set of overhead metrics of using DDS in a distributed partitioned platform is also provided.
Cache locking is a commonly used mechanism to improve both performance and predictability for embedded programs. Dynamic cache locking methods proposed in the literature, where the locked content is modified during ex...
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ISBN:
(纸本)9798350387964;9798350387957
Cache locking is a commonly used mechanism to improve both performance and predictability for embedded programs. Dynamic cache locking methods proposed in the literature, where the locked content is modified during execution, require inserting locking and unlocking instructions in the program's code. In this paper, we introduce a novel hardware mechanism that leverages the LRU age bits to perform duration-based locking. Our proposed mechanism dynamically locks and unlocks cache lines for different durations at run-time, without the need to modify the program's code. We further devise a heuristic that analyzes a program's loop structure and selects the set of addresses to be locked in a L1 instruction cache alongside their locking durations. Evaluation results show that our duration-based locking mechanism achieves comparable results to the dynamic approach while substantially reducing the initialization overhead and avoiding program code modifications.
Mobile Edge computing (MEC) places computing and storage resources on the network's edge, which opens the door for implementing an entirely new set of delay-sensitive and compute-intensive applications in constrai...
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ISBN:
(纸本)9798350366457;9798350366440
Mobile Edge computing (MEC) places computing and storage resources on the network's edge, which opens the door for implementing an entirely new set of delay-sensitive and compute-intensive applications in constrained IoT devices. Nevertheless, from the perspective of an IoT device, using MEC introduces several challenges that need to be addressed. One is the proper execution and resource utilization of device-native and edge-dependent tasks, especially when considering multi-task edge applications. Current real-time schedulers do not contemplate factors inherent to the nature of MEC, such as shared resource utilization, dynamic execution site migrations, the influence of remote computing, etc. therefore, this paper introduces an agent embedded in IoT devices to provide real-time schedulers with mobile edge computing awareness. Moreover, the performance of the proposed solution is assessed by running two multi-task edge applications in the smart vehicles domain, depicting a considerable task throughput enhancement when compared to existing real-time schedulers.
As autonomous driving systems mature, the importance of fault tolerance to provide safe operation even in hazardous conditions becomes a key issue in deployment. In an autonomous driving system composed of redundant d...
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ISBN:
(纸本)9798350387964;9798350387957
As autonomous driving systems mature, the importance of fault tolerance to provide safe operation even in hazardous conditions becomes a key issue in deployment. In an autonomous driving system composed of redundant devices, it is necessary to maintain consistency across the system regarding which devices should currently be handling processing. In this paper, we present a new leader election algorithm for autonomous driving systemsthat guarantees consistency in the presence of the failure of any single system component. To make the algorithm practical for autonomous driving systems, we design it to both handle network link failures and guarantee liveness in the presence of a single failure. Due to the safety-critical nature of our environment and the known difficulty of testing distributed algorithms, we use formal verification to validate our proposed algorithm. Our experiments show that the algorithm completes with reasonable time in a simulated environment of an autonomous driving system.
this paper presents a real-timeembeddedthermal imaging system architecture for compact, energy-efficient, high-quality imaging utilizing heterogeneous system-on-chip (SoC) and uncooled infrared focal plane arrays (I...
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ISBN:
(纸本)9798350387964;9798350387957
this paper presents a real-timeembeddedthermal imaging system architecture for compact, energy-efficient, high-quality imaging utilizing heterogeneous system-on-chip (SoC) and uncooled infrared focal plane arrays (IRFPAs). Unlike previous systemsthat organized separate devices for complex image processing, our system provides integrated image processing support for robust sensor-to-surveillance. the image processing organizes two algorithm stacks: a non-uniformity correction stack to mitigate the distinctive noise vulnerabilities of uncooled IRFPAs, and an image enhancement stack including contrast enhancement and temporal noise filters. We optimized these algorithms for domain-specific factors, including asymmetric multiprocessing (AMP), cache organization, single instruction multiple data (SIMD) instructions, and very long instruction word (VLIW) architectures. the implementation on the TI TDA3x SoC demonstrates that our system can process 640x480, 60 frames per second (FPS) videos at a peak core load of 57.5% while consuming power less than 2.2 W for the entire system, denoting the possibility of processing the 1280x1024, 30 FPS videos from the cutting-edge uncooled IRFPAs. Additionally, our system improves power efficiency by 9.42% and 9.96% at 30 and 60 FPS, respectively, compared to the state-of-the-art when executing similar image processing algorithms.
Out-of-distribution (OOD) detectors can act as safety monitors in embedded cyber-physical systems by identifying samples outside a machine learning model's training distribution to prevent potentially unsafe actio...
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ISBN:
(纸本)9798350387964;9798350387957
Out-of-distribution (OOD) detectors can act as safety monitors in embedded cyber-physical systems by identifying samples outside a machine learning model's training distribution to prevent potentially unsafe actions. However, OOD detectors are often implemented using deep neural networks, which makes it difficult to meet real-time deadlines on embeddedsystems with memory and power constraints. We consider the class of variational autoencoder (VAE) based OOD detectors where OOD detection is performed in latent space, and apply quantization, pruning, and knowledge distillation. these techniques have been explored for other deep models, but no work has considered their combined effect on latent space OOD detection. While these techniques increase the VAE's test loss, this does not correspond to a proportional decrease in OOD detection performance and we leverage this to develop lean OOD detectors capable of real-time inference on embedded CPUs and GPUs. We propose a design methodology that combines all three compression techniques and yields a significant decrease in memory and execution time while maintaining AUROC for a given OOD detector. We demonstrate this methodology with two existing OOD detectors on a Jetson Nano and reduce GPU and CPU inference time by 20% and 28% respectively while keeping AUROC within 5% of the baseline.
this study introduces a dynamic platform with a micro-electromechanical system (MEMS) microphone array for robust unmanned aerial vehicle (UAV) detection and tracking. Leveraging the compactness of MEMS technology, th...
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ISBN:
(纸本)9798350386851;9798350386844
this study introduces a dynamic platform with a micro-electromechanical system (MEMS) microphone array for robust unmanned aerial vehicle (UAV) detection and tracking. Leveraging the compactness of MEMS technology, the platform integrates microphones to capture UAV acoustic signatures using Direction of Arrival (DOA) and Beamforming technologies. Its adaptability optimizes surveillance coverage, surpassing the limitations of visual tracking in adverse conditions. this research details the design, calibration, and integration processes, validated through rigorous testing. this innovation improves real-time situational awareness, offering a promising solution for security and defense applications.
As the deployment of fifth generation (5G) mobile wireless networks continues to gain momentum, researchers are already focusing on the challenges and opportunities of the next sixth generation (6G). To meet the ever-...
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ISBN:
(纸本)9798350387964;9798350387957
As the deployment of fifth generation (5G) mobile wireless networks continues to gain momentum, researchers are already focusing on the challenges and opportunities of the next sixth generation (6G). To meet the ever-increasing demand for higher data rates and support the development of new services, 6G is expected to exploit millimeter wave (mmWave) frequencies. However, the complex propagation characteristics at mmWave require beamforming technology, which introduces significant complexity in the communication system. Herein, we propose a real-time testbed platform to evaluate beamforming and other communication solutions designed for multiple-input multiple-output (MIMO) mmWave-based 6G networks. this platform serves as an enabler for 6G technologies evaluation under realistic propagation conditions, accelerating the development and deployment of robust and efficient 6G networks. To demonstrate the capabilities of our platform, we have implemented a smart relay withreal-time beam control and tracking. the platform is able to perform an exhaustive search of 64 reception beams in less than 256 mu s. Additionally, the platform can maintain the optimal beam even in mobility scenarios using a gradient-based tracking system that achieves a low overhead of less than 5%, with an update rate of 100 Hz.
In this paper, we propose the addition of a time-parameter in affective state analysis to enhance emotion classification precision in Affective computing. We review the characteristics and dynamic nature of emotions a...
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In multiprocessor-based real-timesystems, main memory is identified as a major bottleneck in the worst-case timing analysis of tasks. Phased execution models such as the 3-phase task model, i.e., that divides the exe...
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ISBN:
(纸本)9798350387964;9798350387957
In multiprocessor-based real-timesystems, main memory is identified as a major bottleneck in the worst-case timing analysis of tasks. Phased execution models such as the 3-phase task model, i.e., that divides the execution of tasks into distinct computation and memory phases, have shown to be a good candidate to tackle the memory contention problem. the 3-phase execution model in particular has gained much attention from both academia and industry as it limits when tasks can access main memory to pre-defined phases. Information on when those phases may happen and their length can then be leveraged to build a fine-grained memory contention analysis. However, the existing work that focus on the memory contention analysis for 3-phase tasks may overestimate the memory contention caused by interfering write requests. this yields pessimistic bounds on the total memory contention suffered by tasks which in turn leads to pessimistic worst-case execution time (WCET) and worst-case response time (WCRT) bounds. In this work, we improve the state-of-the-art memory contention analysis for 3-phase tasks by (i) tightly bounding the memory contention that can be suffered due to write requests;and (ii) providing a new memory contention-aware WCET analysis.
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