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检索条件"任意字段=11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications"

共 2194 条记录，以下是211-220 订阅

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Enhanced Schedulability Tests for real-time Regularity-Based Virtualized systems with Dependent and Self-Suspension Tasks 27

Enhanced Schedulability Tests for Real-Time Regularity-Based...

引用

27th ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Dai, Guangli Paluri, Pavan Kumar Cheng, Albert Mo Kim Univ Houston Dept Comp Sci Houston TX 77004 USA

ISBN: (纸本)9781665441889

As virtualization becomes increasingly popular, more critical applications that require real-time performance guarantees are deployed on virtualized systems. In such systems, the Hierarchical real-time Scheduling (HiRTS) framework divides the scheduling problem into task-level scheduling and resource-level scheduling. Specifically, resource-level scheduling divides a physical resource into multiple resource partitions while task-level scheduling schedules the tasks on each resource partition. Accordingly, the Regularity-based Resource Partitioning (RRP) model offers efficient resource-level scheduling. Despite the availability of adequate resource-level tools, the task-level scheduling based on the RRP model still has a scope for improvements. To extend the applicability of the RRP model under a variety of task workload environments, this paper offers: (1) a more practical schedulability test for independent tasks whose key parameters, i.e., Worst-Case Execution time (WCET), period and deadline, are non-integral multiples of a time slice;(2) a tuned Earliest Deadline First (EDF) scheduling approach and a corresponding schedulability test for intra-VM dependent tasks;(3) schedulability tests for self-suspended tasks based on Fixed-Relative-Deadline (FRD) scheduling strategies.

关键词： Schedules Scheduling algorithms conferences Computational modeling Tools real-time systems Scheduling

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Towards a Formal Verification of Seamless Cryptographic Rekeying in real-time Communication systems 11

Towards a Formal Verification of Seamless Cryptographic Reke...

引用

11th ieee international conference on Intelligent Data Acquisition and Advanced computing systems - Technology and applications (IDAACS)

作者： Buehler, Heiko Zbrzezny, Andrzej Zbrzezny, Agnieszka M. Walz, Andreas Sikora, Axel Offenburg Univ Appl Sci Inst Reliable Embedded Syst & Commun Elect ivESK Badstr 24 D-77652 Offenburg Germany Jan Dlugosz Univ Czestochowa Dept Math & Comp Sci Armii Krajowej 13-15 PL-42200 Czestochowa Poland Univ Warmia & Mazury Fac Math & Comp Sci Sloneczna 54 PL-10710 Olsztyn Poland

ISBN: (纸本)9781665426053

this paper makes two contributions to the verification of communication protocols by transition systems. Firstly, the paper presents a modeling of a cyclic communication protocol using a synchronized network of transition systems. this protocol enables seamless cryptographic rekeying embedded into cyclic messages. Secondly, we test the protocol using the model checking verification technique.

关键词： transition system modeling model checking

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Design Methodology for Deep Out-of-Distribution Detectors in real-time Cyber-Physical systems 28

Design Methodology for Deep Out-of-Distribution Detectors in...

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28th ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Yuhas, Michael Ng, Daniel Jun Xian Easwaran, Arvind Nanyang Technol Univ Singapore Singapore

ISBN: (数字)9781665453448

ISBN: (纸本)9781665453448

When machine learning (ML) models are supplied with data outside their training distribution, they are more likely to make inaccurate predictions;in a cyber-physical system (CPS), this could lead to catastrophic system failure. To mitigate this risk, an out-of-distribution (OOD) detector can run in parallel with an ML model and flag inputs that could lead to undesirable outcomes. Although OOD detectors have been well studied in terms of accuracy, there has been less focus on deployment to resource constrained CPSs. In this study, a design methodology is proposed to tune deep OOD detectors to meet the accuracy and response time requirements of embedded applications. the methodology uses genetic algorithms to optimize the detector's preprocessing pipeline and selects a quantization method that balances robustness and response time. It also identifies several candidate task graphs under the Robot Operating System (ROS) for deployment of the selected design. the methodology is demonstrated on two variational autoencoder based OOD detectors from the literature on two embedded platforms. Insights into the trade-offs that occur during the design process are provided, and it is shown that this design methodology can lead to a drastic reduction in response time in relation to an unoptimized OOD detector while maintaining comparable accuracy.

关键词： Training Quantization (signal) Design methodology Pipelines Detectors Cyber-physical systems real-time systems

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Supporting Dynamic Voltage and Frequency Scaling in Networks-On-Chip for Hard real-time systems 24

Supporting Dynamic Voltage and Frequency Scaling in Networks...

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24th ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Kostrzewa, Adam Kadeed, thawra Nikolic, Borislav Ernst, Rolf Tech Univ Carolo Wilhelmina Braunschweig Braunschweig Germany

ISBN: (纸本)9781538677599

Networks-On-Chip (NoCs) designed to host advanced embedded applications require simultaneously high performance and efficient real-time guarantees under tight power limitations. Static power management is no longer sufficient to fulfill these goals in the context of a highly dynamic environment, e.g. autonomous driving, leading to mode-dependent system's behavior and substantial changes in traffic patterns. For this purpose, we propose a global and self-aware power management for NoCs. Dynamic voltage and frequency adjustments are performed at runtime depending on the number of currently active applications using protocol-based synchronization. the safety of a solution is assured by formal analysis and extensive experimental evaluation using an vehicle assistance functions, as well as synthetic benchmarks. the proposed scheme provides the desired performance, and when compared with the state-of-the-art approach, it significantly decreases power footprint of the NoC-up to 59% in the considered realistic use-case.

关键词： real-time systems Safety Vehicle dynamics Power system management Transient analysis Runtime Synchronization

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ROBTIC: An On-Chip Instruction Cache Design for Low Power embedded systems

ROBTIC: An On-Chip Instruction Cache Design for Low Power Em...

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15th ieee international conference on embedded and real-time computing systems and applications

作者： Gu, Ji Guo, Hui Li, Patrick Univ New S Wales Sch Engn & Comp Sci Sydney NSW 2052 Australia

ISBN: (纸本)9780769537870

the on-chip instruction cache is a potential power hungry component in embedded systems due to its large chip area and high access-frequency. Aiming at reducing power consumption of the on-chip cache, we proposed a Reduced One-Bit Tag Instruction Cache (ROBTIC), where the cache size is judiciously reduced and the cache tag field only contains the least significant bit of the full tag. We developed a cache operational control scheme for ROBTIC so that with the one-bit cache tag, the program locality can still be efficiently exploited. For applications where most of the memory accesses are localized, our cache is able to achieve similar performance as a traditional full-tag cache;however, the power consumption of the cache can be significantly reduced due to the much smaller cache size, narrower tag array (just one bit), and tinier tag comparison circuit being used. the experiments on a set of benchmarks demonstrate that our approach can reduce up to 25.8% power consumption and 30.9% area of the traditional cache when the cache size is fixed at 32 instructions. With the cache size customization, a further 48% power saving can be achieved.

关键词： Electric power utilization

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A Soft real-time Memory Request Scheduler for Phase Change Memory systems 27

A Soft Real-time Memory Request Scheduler for Phase Change M...

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27th ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Aswathy, N. S. Kapoor, Hemangee K. Sarkar, Arnab IIT Guwahati Dept CSE Gauhati India IIT Kharagpur Adv Technol Dev Ctr ATDC Kharagpur W Bengal India

ISBN: (纸本)9781665441889

Phase Change Memory (PCM) has emerged as a viable alternative to traditional DRAM memories especially in real-time embedded systems, due to their higher density and lower leakage power dissipation. However, PCM comes with its own drawbacks. Although, the performances of DRAM and PCM are comparable for memory reads, PCM is about three times slower in terms of write latency, and suffers from significantly lower write endurance. the high write latency of PCM may be detrimental to delivered QoS and may lead to deadline misses in real-time systems. To circumvent the problem, this paper proposes a novel memory scheduling scheme which employs separate write request buffer in order to prioritize reads over writes. the read requests are scheduled using an urgency based scheduler where urgency depends on allowable response times of tasks. the write requests are serviced when there are no pending reads using a similar urgency based scheduler as used for read requests. Experimental evaluation using standard benchmarks reveal that the proposed scheme is able to achieve better normalized QoS compared to existing scheduling techniques for PCM and comparable access latencies with respect to DRAM.

关键词： Deadlines real-time Reward-aware Scheduling PCM Read/Write latency

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Branch Prediction Directed Dynamic Instruction Cache Locking for embedded systems

Branch Prediction Directed Dynamic Instruction Cache Locking...

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ieee 19th international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Qiu, Keni Zhao, Mengying Xue, Chun Jason Orailoglu, Alex City Univ Hong Kong Dept Comp Sci Hong Kong Hong Kong Peoples R China Univ Calif San Diego Dept Comp Sci & Engn San Diego CA 92103 USA

ISBN: (纸本)9781479908509

Cache locking is a cache management technique to preclude the replacement of locked cache contents. Cache locking is often used to improve cache access predictability in Worst-Case Execution time (WCET) analysis. Static cache locking methods have been proposed recently to improve average system performance. this paper presents an approach, Branch Prediction directed Dynamic Cache Locking (BPDCL), to improve average system performance through effective cache conflict miss reduction in different execution regions. In this proposed approach, the control flow graph of a program is partitioned into regions and memory blocks worth locking for each region are calculated during compilation time. At runtime, directed by branch predictions, locking routines are prefetched into a high-speed buffer. the pre-determined cache locking contents are loaded and locked at specific execution points during program execution. Experimental results show that the proposed BPDCL method exhibits an average improvement of 21.8% and 10.3% on cache miss rate reduction in comparison to the case with no cache locking and the static locking method respectively.

关键词： embedded systems

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Efficiently accessing remote resources in distributed real-time systems

Efficiently accessing remote resources in distributed real-t...

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13th ieee international conference on embedded and real-time computing systems and applications

作者： Usher, Paul S. Audsley, Neil C. Univ York Dept Comp Sci York YO10 5DD N Yorkshire England

ISBN: (纸本)9780769529752

this paper examines the structures that are used by traditional real-time and networked operating systems in order to show that they are poorly suited to providing efficient access to remote devices. It also argues that efficiency can be improved by being more specific and by making better use of the network mediums characteristics.

关键词： real time systems

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An embedded-Based Distributed Private Cloud: Power Quality Event Classification 16

An Embedded-Based Distributed Private Cloud: Power Quality E...

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16th ieee international conference on High Performance computing and Communications HPCC 2014\11th ieee international conference on embedded Software and systems ICESS 2014\6th international Symposium on Cyberspace Safety and Security CSS 2014

作者： Zheng, Xiang-Yao Jiang, Joe-Air Chen, Chia-Pang Natl Taiwan Univ Dept Bioind Mech Taipei Taiwan Natl Taiwan Univ Dept Elect Engn Taipei Taiwan

ISBN: (纸本)9781479961238

this study designs and implements an embedded system-based distributed private cloud (EBDPC), which is a real-time analyzing device used in a wireless sensor network (WSN) monitoring system application. the proposed system consists of several low cost embedded systems for the detection, classification, and measurement of six types of power quality events, including impulse, voltage sag, voltage swell, interruption, harmonics, and flicker. Fast Fourier Transform (FFT) methods are used for automatic signal classification and characterization, and real-time notification for disturbance detection. A light-weighted load balance algorithm is also included in the proposed system for handling a great amount of data collected from electric sensors. the system has been successfully applied to detecting, classifying, and measuring disturbances in a power quality monitoring WSN.

关键词： Power quality (PQ) embedded distributed privated cloud (EBDPC) Light weighted load balance algorithm (LBA) Fast Fourier Transform (FFT)

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Student Session: Turning Over Detecting Using Super-Resolution thermal Image 26

Student Session: Turning Over Detecting Using Super-Resoluti...

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ieee 26th international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Chou, Jyun-Jhe Shih, Chi-Sheng Natl Taiwan Univ Dept Comp Sci & Informat Engn Embedded Syst & Wireless Networking Lab Taipei Taiwan Natl Taiwan Univ Grad Inst Networking & Multimedia Dept Comp Sci & Informat Engn Embedded Syst & Wireless Networking Lab Taipei Taiwan

ISBN: (纸本)9781728144030

A low resolution infrared camera can use to collect the data of our daily activity, and protect privacy. However, pose detection on an extremely low resolution image will be a big challenge to deal with. Many researches show that Super-resolution may improve the accuracy of object detection on low resolution images. In this work, we detect the turning over while sleeping with low-resolution thermal sensors. To improve the accuracy of detection, we fuse the data from multiple sensors and use SRCNN to enhance the resolution. We also propose a method to reduce the noise caused by the residual body temperature on bed after turn over while detect the pose and turning over. the accuracy of pose detection is 65%, and the turning over detection has 50% recall rate and 83% precision.

关键词： Image enhancement

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