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Execution of Resource Intensive Tasks on a Heterogeneous SoC for Low-Latency embedded Compute

Execution of Resource Intensive Tasks on a Heterogeneous SoC...

引用

international Carpathian Control conference (ICCC)

作者： Gábor Fekete Tamás Kovácsházy Department of Measurement and Information Systems Budapest University of Technology and Economics Budapest Hungary

Execution of resource-intensive tasks, such as artificial intelligence (AI), big-data algorithms, video processing, etc. is a common requirement in distributed embedded systems today. the typical solution is to execute such algorithms on some cloud computing service, as embedded systems do not have the computing resources for such tasks. However, this approach is not viable in real-time Cyber-Physical systems (RT-CPS) due to the high-latency, non-real-time nature of cloud computing. the latency requirements can be only satisfied with an edge compute solution in the form of an edge data center or by a heterogeneous System on Chip (SoC) based implementation, which has the required high-performance computing resources on the chip. In the paper, we investigate the viability of the heterogeneous SoC compute approach on the Texas Instruments AM5729 SoC, which was specifically designed for such applications. the paper introduces the hardware capabilities of the SoC, the software development, and the run-time (Linux-based) environment, and presents the results of a detailed performance evaluation on relevant computing tasks.

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A Comparative Analysis of Deep Learning-Based Object Detectors for embedded systems

A Comparative Analysis of Deep Learning-Based Object Detecto...

引用

IEEE international Workshop on Intelligent Data Acquisition and Advanced computing systems: Technology and applications

作者： Yehor Boltov Inna Skarga-Bandurova Maryna Derkach G.E. Pukhov Institute for Modelling in Energy Engineering Kyiv Ukraine Oxford Brookes University Oxford UK Ternopil Ivan Puluj National Technical University Ternopil Ukraine

the paper presents a comparative analysis of popular deep learning-based object detectors, focusing on evaluating their real-time performance on embedded platforms. the objective was to identify the optimal algorithm that can efficiently operate within limited computational resources and memory constraints of embedded systems while minimizing energy consumption. We tested a set of popular detectors, such as Faster R-CNN, YOLO, and SSD MobileNet and evaluated their performance on the testing platform with CUDA cores. A faster variant of bounding box suppression, blazing fast Non-Maximum Suppression (NMS), was employed to enhance efficiency. Additionally, the generalized intersection over union (GIoU) metric was adopted as the optimal testing method, allowing for more accurate object localization and detection. Results demonstrate that the SSD MobileNet-V2 and Tiny YOLO detectors exhibit promising real-time performance on embedded platforms, although their accuracy is diminished compared to larger models.

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Optimising for Dense Deployments in Commercial Ambient Human Sensing with WiFi CSI

Optimising for Dense Deployments in Commercial Ambient Human...

引用

IEEE international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Glenn Forbes Stewart Massie Robert Gordon University Aberdeen Scotland

ISBN: (数字)9798350387957

ISBN: (纸本)9798350387964

WiFi Channel State Information (CSI) is widely-used in research for human sensing applications, yet its actual deployment in commercial real-time applications remains sparse with few examples. Existing demonstrations in research literature predominantly rely on specialised deployments of a single sensing apparatus, which cannot efficiently be used in large-scale deployments. Additionally packet loss is common which leads to an over-reliance on interpolation for missing points. Addressing these gaps, this paper presents a low-cost, and scalable solution for CSI-based human sensing, tailored for high performance and consistent operation in residential *** approach leverages ESP32 hardware which is renowned for its high availability and low-cost compared to popular CSI collection solutions. We define a methodology for remotely collecting CSI data from multiple sensors concurrently over WiFi, by employing a single beacon for traffic generation while CSI data is gathered over a separate channel. We further optimize this process using DEFLATE compression on CSI payloads to minimize airtime contention during transmission. this proposed system has been evaluated through a series of experiments designed to assess its viability, scalability, and environmental adaptation capability. Notably, we demonstrate the system’s capability to support 30 sensors sampling CSI data at over 90Hz simultaneously, with additional projected capacity. this validation has been conducted across two distinct residential environments, affirming the adaptability and effectiveness of our approach for high-performance CSI sensing in real-world scenarios.

关键词： Interpolation Scalability Packet loss real-time systems Sensor systems Hardware Sensors Wireless fidelity Channel state information Payloads

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A ROS 2 and TwinCAT Based Digital Twin Framework for Mechatronics systems

A ROS 2 and TwinCAT Based Digital Twin Framework for Mechatr...

引用

international conference on Control, Mechatronics and Automation (ICCMA)

作者： Alexander Sterk-Hansen Bjørn H.H. Saghaug Daniel Hagen Muhammad Faisal Aftab Dep. of Engineering Sciences University of Agder Grimstad Norway

this paper presents a digital twin framework as a first step towards developing digital twin-based control systems for autonomous lifting and load-handling operations. the proposed digital twin framework has been divided into three main parts: a) a real-time control and simulation environment using TwinCAT 3 running on a Beckhoff embedded PC with EtherCAT Fieldbus, b) a ROS 2 interface (middleware), and c) a virtual environment using the state-of-the-art game engine software NVIDIA Isaac Sim. the investigated case study demonstrates that the proposed architecture offers scalability and forms a promising baseline for further developing a general-purpose digital twin development platform suitable for developing autonomous control systems for various mechatronics systems and applications.

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Design of a Scaled-Vehicle Research Platform for Software-Defined Vehicles

Design of a Scaled-Vehicle Research Platform for Software-De...

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Mechatronics and Robotics Engineering (ICMRE), international conference on

作者： Sung Bhin Oh Young Soo Do Se Jeong Lim Hyeok Jun Choi Sung Keun Cha Hyeong Keun Hong Seong Hyeon Lim Jae Wook Jeon Department of Electrical and Computer Engineering Sungkyunkwan University Suwon Korea

ISBN: (数字)9798331509293

ISBN: (纸本)9798331509309

Modern vehicles are integrated systems of complex software that support advanced features such as autonomous driving and over-the-air updates. Software-defined vehicles (SDVs) are emerging as a future automotive paradigm for managing increasing software complexity by centralizing computing resources and enabling flexible software updates and feature deployment. However, most SDV research is conducted in simulation environments because using real vehicles presents many challenges, including high cost, safety concerns, and implementation difficulties. In this paper, we present the design of an SDV research platform using a 1/5-scale vehicle model to overcome these limitations of SDV research. the platform implements a zone architecture and integrates various embedded systems to replicate the distributed computing environment of a modern vehicle. the platform allows researchers to experiment with different SDV concepts such as distributed computing, OTA updates, middleware, and vehicle software management without the constraints of full-scale vehicle testing. Our design demonstrates the feasibility of using extended vehicles for SDV research and provides insights into platform design for SDV research.

关键词： Mechatronics embedded systems Wireless networks Computer architecture Safety Distributed computing Middleware Robots Automotive engineering Testing

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Improving Read Performance for LDPC-Based SSDs with Adaptive Bit Labeling on $V_{th}$ States

Improving Read Performance for LDPC-Based SSDs with Adaptive...

引用

IEEE international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Jia-Xin Hou Li-Pin Chang Department of Computer Science National Yang Ming Chiao Tung University Hsinchu Taiwan

NAND-based Solid-State Disks (SSDs) have become the mainstream storage solution thanks to their high I/O performance and data persistency. Modern SSDs boost their storage capacity by increasing the flash cell-bit density, resulting in severe leakage-induced bit errors over time. Low-Density Parity-Check (LDPC) is a common error correcting code for flash memory, which features incremental decoding strength levels through adding extra voltage sensing levels. However, when bit error rate becomes high, LDPC decoding with strong correction will be very slow. In this study, we identify that the read latency is strongly correlated with the method of bit labeling on cell threshold-voltage states, and based on this finding we propose using adaptive bit labeling to optimize the SSD read latency. Specifically, our method employ 2-3-2 Gray Coding as the default mode, and frequently-read data will be switched to using the least-significant page and center-significant page with 1-2-4 Gray Coding for fast reading. Our experimental results show that our design greatly outperforms static bit labeling and a state-of-the-art method.

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Improved Memory Contention Analysis for the 3-Phase Task Model

Improved Memory Contention Analysis for the 3-Phase Task Mod...

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IEEE international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Jatin Arora Syed Aftab Rashid Geoffrey Nelissen Claudio Maia Eduardo Tovar CISTER ISEP Porto Portugal VORTEX CoLab Portugal Hitachi Energy Research Baden-Dattwil Switzerland Eindhoven University of Technology Eindhoven the Netherlands

ISBN: (数字)9798350387957

ISBN: (纸本)9798350387964

In multiprocessor-based real-time systems, main memory is identified as a major bottleneck in the worst-case timing analysis of tasks. Phased execution models such as the 3-phase task model, i.e., that divides the execution of tasks into distinct computation and memory phases, have shown to be a good candidate to tackle the memory contention problem. the 3-phase execution model in particular has gained much attention from both academia and industry as it limits when tasks can access main memory to pre-defined phases. Information on when those phases may happen and their length can then be leveraged to build a fine-grained memory contention analysis. However, the existing work that focus on the memory contention analysis for 3-phase tasks may overestimate the memory contention caused by interfering write requests. this yields pessimistic bounds on the total memory contention suffered by tasks which in turn leads to pessimistic worst-case execution time (WCET) and worst-case response time (WCRT) bounds. In this work, we improve the state-of-the-art memory contention analysis for 3-phase tasks by (i) tightly bounding the memory contention that can be suffered due to write requests; and (ii) providing a new memory contention-aware WCET analysis.

关键词： Industries Analytical models Computational modeling real-time systems Timing time factors

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Highly Accurate Approximate Ternary Multipliers for Error Resilient applications

Highly Accurate Approximate Ternary Multipliers for Error Re...

引用

Intelligent systems and embedded Design (ISED), international conference on

作者： Shalini Burri Gowtham Sri Harsha Kudulla Pavan Kumar Jogi Anantha Sai Satwik Vysyaraju Uppugunduru Anil Kumar Syed Ershad Ahmed Sreehari Veeramachaneni Electronics and Communication Engineering Gokaraju Rangaraju Institute of Engineering & Technology Hyderabad India Electrical and Electronics Engineering BITS Pilani Hyderabad India Electronics and Communication Engineering Faculty of Science and Technology (IcfaiTech) The ICFAI Foundation for Higher Education Hyderabad India

Approximate computing is a technique to obtain notable improvement in power and power-delay product parameters where accurate computation is not necessary. this paper presents a simple and energy-efficient approximate 1-blt ternary multiplier and approximate ternary half adder, which are used to implement $6\times 6$ approximate ternary multipliers. the $6\times 6$ ternary multipliers are implemented by introducing errors in generation or reduction stages. the proposed approximate ternary $6\times 6$ multipliers show good accuracy-power trade-off compared to existing designs; it exhibits an improvement up to 99.6% in terms of NMED*Power parameter compared to existing approximate multiplier designs. Further proposed ternary multipliers are evaluated using image processing applications.

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real-time Beamforming Testbed and Tracking Relay for mmWave applications

Real-time Beamforming Testbed and Tracking Relay for mmWave ...

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IEEE international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Lorenzo Bisulli Davide Scazzoli Francesco Linsalata Maurizio Magarini Marouan Mizmizi Christian Mazzucco Umberto Spagnolini Department of Electronics Information and Bioengineering Politecnico di Milano Milan Italy

ISBN: (数字)9798350387957

ISBN: (纸本)9798350387964

As the deployment of fifth generation (5G) mobile wireless networks continues to gain momentum, researchers are already focusing on the challenges and opportunities of the next sixth generation (6G). To meet the ever-increasing demand for higher data rates and support the development of new services, 6G is expected to exploit millimeter wave (mmWave) frequencies. However, the complex propagation characteristics at mmWave require beamforming technology, which introduces significant complexity in the communication system. Herein, we propose a real-time testbed platform to evaluate beamforming and other communication solutions designed for multiple-input multiple-output (MIMO) mmWave-based 6G networks. this platform serves as an enabler for 6G technologies evaluation under realistic propagation conditions, accelerating the development and deployment of robust and efficient 6G networks. To demonstrate the capabilities of our platform, we have implemented a smart relay with real-time beam control and tracking. the platform is able to perform an exhaustive search of 64 reception beams in less than 256 μs. Additionally, the platform can maintain the optimal beam even in mobility scenarios using a gradient-based tracking system that achieves a low overhead of less than 5%, with an update rate of 100 Hz.

关键词： 6G mobile communication Particle beams Array signal processing Wireless networks Millimeter wave technology Millimeter wave propagation real-time systems Synchronization Millimeter wave communication Relays

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Container Performance in Space systems 25th

Container Performance in Space Systems

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25th international conference on Internet computing and IoT, ICOMP 2024, and 22nd international conference on embedded systems, Cyber-physical systems, and applications, ESCS 2024, held as part of the World Congress in Computer Science, Computer Engineering and Applied computing, CSCE 2024

作者： Alamgir, Shariar M. Bohra, Dhruv L. Nguyen, Elisabeth A. Embedded and Specialized Computing Department The Aerospace Corporation El SegundoCA United States Software Architecture and Engineering Department The Aerospace Corporation El SegundoCA United States

ISBN: (纸本)9783031859229

Critical embedded software, such as spacecraft flight software, requires high reliability, efficiency, and real-time performance while being capable enough to meet application needs. the increasing prevalence of Linux, and in particular Linux containers, presents opportunities for space systems but also poses potential risks since Linux was not designed to be a real-time operating system. In this study, we conducted a variety of experiments to look at both the overhead imposed by containers and the latency experienced in Linux using various combinations of patched OS and containers running on a Raspberry Pi 4. We found that containers have little impact on CPU utilization but do incur penalties in RAM, disk storage, and startup time. We also found the unpatched Linux kernel performs well for real time;and that, while the real-time kernel patch reduces both overall and maximum latency, it can negatively impact performance, particularly on single-core systems running non-real-time tasks. © the Author(s), under exclusive license to Springer Nature Switzerland AG 2025.

关键词： Linux

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