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检索条件"任意字段=11th International Symposium on Parallel Architectures, Algorithms and Programming, PAAP 2020"

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Towards Profile-Guided Optimization for Safe and Efficient parallel Stream Processing in Rust 32

Towards Profile-Guided Optimization for Safe and Efficient P...

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32nd IEEE international symposium on Computer Architecture and High-Performance Computing (SBAC-PAD) / 11th Workshop on Applications for Multi-Core architectures (WAMCA)

作者： Sydow, Stefan Nabelsee, Mohannad Glesner, Sabine Herber, Paula Tech Univ Berlin Berlin Germany Univ Munster Munster Germany

ISBN: (纸本)9781728199245

the efficient mapping of stream processing applications to parallel hardware architectures is a difficult problem. While parallelization is often highly desirable as it reduces the overall execution time, its advantages must be carefully weighed against the parallelization overhead of complexity and communication costs. this paper presents a novel profile-guided optimization for parallel stream processing based on the multi-paradigm system programming language Rust. Our approach's key idea is to systematically balance the performance gain that can be achieved from parallelization with the communication overhead. To achieve this, we 1) use profiling to gain tight estimates of task execution times, 2) evaluate the cost of the fundamental concurrency constructs in Rust with synthetic benchmarks, and exploit this information to estimate the communication overhead introduced by various degrees of parallelism, and 3) present a novel optimization algorithm that exploits both estimates to finetune the degree of parallelism and train processing in a given application. Overall, our approach enables us to map parallel stream processing applications to parallel hardware efficiently. the safety concepts anchored in Rust ensure the reliability of the resulting implementation. We demonstrate our approach's practical applicability with two case studies: the word count problem and aircraft telemetry decoding.

关键词： Stream Processing parallel programming Rust Performance Modelling

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A Fast and Concise parallel Implementation of the 8x8 2D IDCT using Halide 32

A Fast and Concise Parallel Implementation of the 8x8 2D IDC...

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32nd IEEE international symposium on Computer Architecture and High-Performance Computing (SBAC-PAD) / 11th Workshop on Applications for Multi-Core architectures (WAMCA)

作者： Johnson, Martin Playne, Daniel Massey Univ Sch Nat & Computat Sci Auckland New Zealand

ISBN: (纸本)9781728199245

the Inverse Discrete Cosine Transform (IDCT) is commonly used for image and video decoding. Due to the ubiquitous nature of this application area, very efficient implementations of the IDCT transform are of great importance and have lead to the development of highly optimized libraries. the popular libjpeg-turbo library contains 1000s of lines of handwritten assembly code utilizing SIMD instruction sets for a variety of architectures. We present an alternative approach, implementing the 8x8 2D IDCT written in the image processing language Halide - a high-level, functional language that allows for concise, portable, parallel and very efficient code. We show how less than 100 lines of Halide can replace over 1000 lines of code for each architecture in the libjpeg-turbo library to perform JPEG decoding. the Halide implementation is compared for ARMv8 and x86-64 SIMD extensions and shows a 5-25 percent performance improvement over the SIMD code in libjpeg-turbo while also being much easier to maintain and port to new architectures.

关键词： Halide Inverse Discrete Cosine Transform JPEG decoding parallel programming

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Automatic generation and assessment of student assignments for parallel programming learning 10th

Automatic generation and assessment of student assignments f...

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10th international symposium on parallel architectures, algorithms and programming, paap 2019

作者： Luo, Zhenxiao Wang, Zelong Wu, Di Hei, Xiaojun Du, Yunfei School of Data and Computer Science Sun Yat-sen University Guangzhou China Guangdong Key Laboratory of Big Data Analysis and Processing Guangzhou510006 China School of Electronic Information and Communications Huazhong University of Science and Technology Wuhan China National Supercomputer Center in Guangzhou Guangzhou China

the course of parallel programming is becoming more and more important for the education of students majoring in computer science. However, it is not easy to learn parallel programming well due to its high theory and practice requirements. In this paper, we design and implement an automatic assignment generation and assessment system to help students learn parallel programming. the assignments can be generated according to user behaviors and thus able to guide students to learn parallel programming step by step. Besides, it can automatically generate an overall assessment of student assignments by using fuzzy string matching, which provides an approximate reference score of objective questions. Subjective questions can be assessed directly by comparing the answer to the reference answer. this system also provides a friendly user interface for students to complete online assignments and let teachers manage their question database. In our teaching practice, students can learn parallel programming more effectively with the help of such an assignment generation and assessment system. © Springer Nature Singapore Pte Ltd. 2020.

关键词： parallel programming

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MASA-StarPU: parallel Sequence Comparison with Multiple Scheduling Policies and Pruning 32

MASA-StarPU: Parallel Sequence Comparison with Multiple Sche...

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32nd IEEE international symposium on Computer Architecture and High-Performance Computing (SBAC-PAD) / 11th Workshop on Applications for Multi-Core architectures (WAMCA)

作者： Lopes, Rafael A. thibault, Samuel Melo, Alba C. M. A. Univ Brasilia UnB Dept Comp Sci Brasilia DF Brazil INRIA Bordeaux Lab Bordeleais Rech Informat Bordeaux France

ISBN: (纸本)9781728199245

Sequence comparison tools based on the Smith-Waterman (SW) algorithm provide the optimal result but have high execution times when the sequences compared are long, since a huge dynamic programming (DP) matrix is computed. Block pruning is an optimization that does not compute some parts of the DP matrix and can reduce considerably the execution time when the sequences compared are similar. However, block pruning's resulting task graph is dynamic and irregular. Since different pruning scenarios lead to different pruning shapes, we advocate that no single scheduling policy will behave the best for all scenarios. this paper proposes MASA-StarPU, a sequence aligner that integrates the domain specific framework MASA to the generic programming environment StarPU, creating a tool which has the benefits of StarPU (i.e., multiple task scheduling policies) and MASA (i.e., fast sequence alignment). MASA-StarPU was executed in two different multicore platforms and the results show that a bad choice of the scheduling policy may have a great impact on the performance. For instance, using 24 cores, the 5M x 5M comparison took 1484s with the dmdas policy whereas the same comparison took 3601s with lws. We also show that no scheduling policy behaves the best for all scenarios.

关键词： parallel sequence comparison parallel programming environment dynamic programming

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Gpu-accelerated parallel aligning long reads with high error rate using enhanced sparse suffix array 10th

Gpu-accelerated parallel aligning long reads with high error...

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10th international symposium on parallel architectures, algorithms and programming, paap 2019

作者： Wei, Hao Zhong, Cheng Chen, Danyang Yin, Mengxiao Zhang, Jinxiong School of Computer Electronics and Information Guangxi University Nanning Guangxi530004 China

the read alignment (sequence alignment) is one of the most basic and time-consuming problems in Bioinformatics. In this paper, a CPU-GPU parallel long-read alignment method is studied to solve this problem. A lightweight data structure using enhanced sparse suffix array is used to store the index of reference genome in order to adapt to the limited memory capacity of GPU architecture. the two-dimensional search space between the reference genome and long reads is divided into several search sub-spaces. the massive long reads alignment is further divided into the multiple long-read alignments with smaller size. A CPU-GPU parallel algorithm aligning long reads with high error rate is implemented by improving the seeds selection scheme. the experimental results show that the parallel algorithm can accelerate remarkably the long-read alignment while maintaining the alignment accuracy and recall rate as a whole. © Springer Nature Singapore Pte Ltd. 2020.

关键词： parallel algorithms

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Advanced parallel Processing Technologies 1

引用

丛书名： Lecture Notes in Computer Science

1000年

作者： Yunji Chen Paolo Ienne Qing Ji

ISBN: (数字)9783319232164

ISBN: (纸本)9783319232157

this book constitutes the proceedings of the 11th international symposium on Advanced parallel Processing Technologies, APPT 2015, held in Jinan, China, in August 2015. the 8 papers presented in this volume were carefully reviewed and selected from 24 submissions. they deal with the recent advances in big data processing; parallel architectures and systems; parallel software; parallel algorithms and applications; and distributed and cloud computing.

关键词： Software Engineering Algorithm Analysis and Problem Complexity Computer Communication Networks Operating Systems programming Languages, Compilers, Interpreters

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Convergence and Scalarization for Data-parallel architectures

Convergence and Scalarization for Data-Parallel Architecture...

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11th IEEE/ACM international symposium on Code Generation and Optimization (CGO)

作者： Lee, Yunsup Krashinsky, Ronny Grover, Vinod Keckler, Stephen W. Asanovic, Krste Univ Calif Berkeley Berkeley CA 94720 USA NVIDIA Santa Clara CA USA Univ Texas Austin Austin TX 78712 USA

ISBN: (纸本)9781467355254;9781467355247

Modern throughput processors such as GPUs achieve high performance and efficiency by exploiting data parallelism in application kernels expressed as threaded code. One draw-back of this approach compared to conventional vector architectures is redundant execution of instructions that are common across multiple threads, resulting in energy inefficiency due to excess instruction dispatch, register file accesses, and memory operations. this paper proposes to alleviate these overheads while retaining the threaded programming model by automatically detecting the scalar operations and factoring them out of the parallel code. We have developed a scalarizing compiler that employs convergence and variance analyses to statically identify values and instructions that are invariant across multiple threads. Our compiler algorithms are effective at identifying convergent execution even in programs with arbitrary control flow, identifying two-thirds of the opportunity captured by a dynamic oracle. the compile-time analysis leads to a reduction in instructions dispatched by 29%, register file reads and writes by 31%, memory address counts by 47%, and data access counts by 38%.

关键词： CUDA GPU Scalarization

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An OpenMP parallel Genetic Algorithm for Design Space Exploration of Heterogeneous Multi-processor Embedded Systems 2020

An OpenMP Parallel Genetic Algorithm for Design Space Explor...

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11th Workshop on parallel programming and Run-Time Management Techniques for Many-Core architectures / 9th Workshop on Design Tools and architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2020

作者： Muttillo, Vittoriano Giammatteo, Paolo Fiorilli, Giuseppe Pomante, Luigi University of L’Aquila L’Aquila Italy

ISBN: (纸本)9781450375450

Heterogeneous multiprocessor platforms are becoming widespread in the embedded system domain, mainly for the opportunity to improve timing performance and to minimize energy/power consumption and costs. therefore, when using such platforms, it is important to adopt a Design Space Exploration (DSE) strategy that considers compromises among different objectives. Existing DSE approaches are generally based on evolutionary algorithms to solve Multi-Objective Optimization Problems (MOOPs) by minimizing a linear combination of weighted cost functions (i.e., Weighted Sum Method, WSM). In this way, the main issues are related to reduce timing execution while trying to improve the evolutionary algorithm performance, introducing strategies that attempt to bring better solutions. Code parallelization is one of the most used approaches in this field, but no standard methods have been released since different aspects could affect the performance. this approach leads to exploit parallel and distributed processing elements in order to implement evolutionary algorithms. In the latter case, if we consider genetic algorithms, it is possible to talk about parallel Genetic algorithms (PGA). Considering this context, this paper focuses on DSE for heterogeneous multi-processor embedded systems and introduces an improvement that reduces execution time using parallel programming languages (i.e., OpenMP) inside the main genetic algorithm approach, while trying to lead to better partitioning solutions. the descriptions of the adopted DSE activities and the OpenMP implementation, validated by means of a case study, represent the core of the paper. © 2020 Association for Computing Machinery.

关键词： Multiobjective optimization

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Extending heterogeneous applications to remote co-processors with rOpenCL 32

Extending heterogeneous applications to remote co-processors...

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32nd IEEE international symposium on Computer Architecture and High-Performance Computing (SBAC-PAD) / 11th Workshop on Applications for Multi-Core architectures (WAMCA)

作者： Alves, Rui Rufino, Jose Inst Politecn Braganca Campus Santa Apolonia P-5300253 Braganca Portugal Inst Politecn Braganca Res Ctr Digitalizat & Intelligent Robot CeDRI Campus Santa Apolonia P-5300253 Braganca Portugal

ISBN: (纸本)9781728199245

In heterogeneous computing systems, general purpose CPUs are coupled with co-processors of different architectures, like GPUs and FPGAs. Applications may take advantage of this heterogeneous device ensemble to accelerate execution. However, developing heterogeneous applications requires specific programming models, under which applications unfold into code components targeting different computing devices. OpenCL is one of the main programming models for heterogeneous applications, set apart from others due to its openness, vendor independence and support for different co-processors. In the original OpenCL application model, a heterogeneous application starts in a certain host node, and then resorts to the local co-processors attached to that host. therefore, co-processors at other nodes, networked with the host node, are inaccessible and cannot be used to accelerate the application. rOpenCL (remote OpenCL) overcomes this limitation for a significant set of the OpenCL 1.2 API, offering OpenCL applications transparent access to remote devices through a TPC/IP based network. this paper presents the architecture and the most relevant implementation details of rOpenCL, together with the results of a preliminary set of reference benchmarks. these prove the stability of the current prototype and show that, in many scenarios, the network overhead is smaller than expected.

关键词： OpenCL heterogeneous computing API forwarding remote execution parallel and distributed computing

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Reliable and energy-aware mapping of streaming series-parallel applications onto hierarchical platforms 32

Reliable and energy-aware mapping of streaming series-parall...

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32nd IEEE international symposium on Computer Architecture and High-Performance Computing (SBAC-PAD) / 11th Workshop on Applications for Multi-Core architectures (WAMCA)

作者： Gou, Changjiang Benoit, Anne Chen, Mingsong Marchal, Loris Wei, Tongquan ENS Lyon CNRS Lip Lab Lyon France East China Normal Univ Shanghai Peoples R China

ISBN: (纸本)9781728199245

Streaming applications come from various application fields such as physics, and many can be represented as a series-parallel dependence graph. We aim at minimizing the energy consumption of such applications when executed on a hierarchical platform, by proposing novel mapping strategies. Dynamic voltage and frequency scaling (DVFS) is used to reduce the energy consumption, and we ensure a reliable execution by either executing a task at maximum speed, or by triplicating it. In this paper, we propose a structure rule to partition the series-parallel applications, and we prove that the optimization problem is NP-complete. We are able to derive a dynamic-programming algorithm for the special case of linear chains, which provides an interesting heuristic and a building block for designing heuristics for the general case. the heuristics performance is compared to a baseline solution, where each task is executed at maximum speed. Simulations demonstrate that significant energy savings can be obtained.

关键词： Mapping Reliability Scheduling Streaming applications throughput

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