检索结果-内蒙古大学图书馆

12th International conference on signal processing and Communication Systems (ICSPCS)

作者： Lewandowsky, Jan Bauch, Gerhard Tschauner, Matthias Oppermann, Peter Hamburg Univ Technol Inst Commun D-21073 Hamburg Germany Fraunhofer Inst Commun Informat Proc & Ergon FKIE D-53343 Wachtberg Germany Fraunhofer Inst Med Image Comp MEVIS D-28359 Bremen Germany

ISBN: (纸本)9781538656020

the Information Bottleneck method allows to construct information-optimum message passing decoders for low-density parity-check codes. In such decoders lookup tables replace the classical node operations of the variable and the check nodes. these lookup tables are designed using the Information Bottleneck principle of maximizing the relevant information. Unlike state-of-the-art decoders which use real valued log-likelihood ratios for decoding, the considered decoders do not process any real values, but only quantization indices. Nevertheless, they have performance extremely close to belief propagation decoding. Since hardware representation of unsigned integers is efficient and lookup table implementations have low complexity, it is reasonable to assume that the designed decoders offer advantages over their conventional counterparts in practice. In this paper, we evaluate, quantify and discuss these advantages in a practical experiment. Our focus lies on a software defined radio application, where the channel decoder is implemented on a digital signal processor. We present several implementations of the considered decoders and compare them with state-of-the-art decoders. Our results show considerable gains of the Information Bottleneck decoders in terms of bit error rate performance and net decoding throughput.

关键词： Decoding Table lookup Iterative decoding Belief propagation Approximation algorithms signal processing algorithms

来源：评论

学校读者我要写书评

暂无评论

Affine Boolean Classification with FPGA Implementation on Secret image Sharing 12

Affine Boolean Classification with FPGA Implementation on Se...

引用

12th International conference on signal processing and Communications (SPCOM)

作者： Bhattacharjee, Tapasi Maity, Hirak K. Maity, Santi P. Techno India Saltlake India Coll Engn & Management Kolaghat India Indian Inst Engn Sci & Technol Sibpur India

ISBN: (纸本)9781538638217

this paper proposes an (n,n)-threshold secret image sharing (SIS) scheme with equal size in shares that are obtained on affine Boolean classification. the two sets of bit patterns, formed from the fixed and the variable bit positions of this classification, are used to develop the shares. Simplicity in Boolean operations leads to its hardware realization in Field Programmable Gate Array (FPGA) platform using Xilinx ISE design suite 14.5 (device family XC3S700A-4FG484). the proposed SIS scheme shows robustness against various operations including random gain scaling. FPGA architecture, for an 8 bits/pixel (8x8) secret image, offers a throughput of 133.4 Mbps at frequency of 288.749 MHz.

关键词： Field programmable gate arrays (FPGA)

来源：评论

学校读者我要写书评

暂无评论

A Spread-Spectrum Watermarking Scheme with Adaptive Embedding Strength and PSNR Guarantee 12

A Spread-Spectrum Watermarking Scheme with Adaptive Embeddin...

引用

12th IEEE International conference on Anti-counterfeiting, Security, and Identification (ASID)

作者： Huang, Ying Guan, Hu Niu, Baoning Zhang, Shuwu Taiyuan Univ Technol Coll Informat & Comp Taiyuan 030024 Shanxi Peoples R China Chinese Acad Sci Inst Automat Beijing 100190 Peoples R China

ISBN: (纸本)9781538660638

Watermarking is a crucial technique for copyright protection of digital images. the most common spread-spectrum watermarking schemes suffer from host signal interference (HSI), which degrades the decode performance. Although this condition can be improved by increasing the embedding strength, it might make the embedded watermark perceptible. this paper solves these problems by proposing a novel blind spread-spectrum watermarking scheme with adaptive embedding strength (SSAES). A notion called the error threshold is introduced to analyze how HSI and distortions compromise robustness and imperceptibility of the spread-spectrum scheme, which motivates us to come up with our solutions. SSAES is HSI free by utilizing the priori knowledge of HSI and features an adjustable embedding strength derived from a theoretical equation related to peak signal-to-noise ratio (PSNR), which strikes a perfect balance between robustness and imperceptibility. SSAES can be easily applied to other watermarking frameworks. the experimental results demonstrate our scheme can ensure that the PSNR of each watermarked image is more than 40 dB and is superior to the state of the art method under the same watermarking framework in any simulation scenarios include image processing attacks and geometric attacks.

关键词： image watermarking spread-spectrum adaptive copyright protection

来源：评论

学校读者我要写书评

暂无评论

Experimental System of W-Band Multi-Channel FMCW Synthetic Aperture Radar for Airborne Platform

Experimental System of W-Band Multi-Channel FMCW Synthetic A...

引用

EUSAR 2018;12th European conference on Synthetic Aperture Radar

作者： Sumin Kim Se-Yeon Jeon Jeongbae Kim Aulia Dewantari Seok Kim Min-Ho Ka Seungha Shin Munsung Kim

In the paper, experimental system of W-band multi-channel FMCW synthetic aperture radar(SAR) for airborne is presented. In cooperation with U-tel co.(ltd, South Korea), Yonsei University(South Korea), is developing 94 GHz SAR system for airborne platform. Goal of design included conventional SAR parameters such as operation scenario, image resolution, image size, slant range, and signal level. the system was divided into three subsystems, transceiver, antenna, and processing board, in order to meet the design goal. Outdoor experiments were conducted within the campus to test the performance of the system.

关键词：

来源：评论

学校读者我要写书评

暂无评论

Results of 'iCaveats', a Project on the Integration of architectures and Components for Embedded Vision 18

Results of 'iCaveats', a Project on the Integration of Archi...

引用

Proceedings of the 12th International conference on Distributed Smart Cameras

作者： R. Carmona-Galán J. Fernández-Berni Á. Rodríguez-Vázquez P. Lopez-Martínez V. M. Brea-Sánchez D. Cabello-Ferrer G. Domenech-Asensi R. Ruiz-Merino J. Zapata-Pérez Instituto de Microelectrónica de Sevilla IMSE-CNM CSIC-Universidad de Sevilla (Spain) Centro Singular en Tecnoloxías da Información (CiTIUS) Univ. Santiago de Compostela (Spain) Dpto. de Electrónica Tecnología de Computadoras y Proyectos Univ. Politécnica Cartagena (Spain)

ISBN: (纸本)9781450365116

iCaveats is a Project on the integration of components and architectures for embedded vision in transport and security applications. A compact and efficient implementation of autonomous vision systems is difficult to be accomplished by using the conventional image processing chain. In this project we have targeted alternative approaches, that exploit the inherent parallelism in the visual stimulus, and hierarchical multilevel optimization. A set of demos showcase the advances at sensor level, in adapted architectures for signal processing and in power management and energy harvesting.

关键词： Vision chips embedded vision systems parallel concurrent processing smart image sensors

来源：评论

学校读者我要写书评

暂无评论

Using Fermat Number Transform to Accelerate Convolutional Neural Network 12

Using Fermat Number Transform to Accelerate Convolutional Ne...

引用

2017 IEEE 12th International conference on ASIC

作者： Weihong Xu Xiaohu You Chuan Zhang Lab of Efficient Architectures for Digital-communication and Signal-processing(LEADS) National Mobile Communications Research Laboratory Southeast University

ISBN: (纸本)9781509066261;9781509066254

Convolutional neural network(CNN),has achieved a significant breakthrough on image recognition and natural language ***,CNNs still suffer from the prohibitive computation *** efforts have been made to reduce the arithmetic complexity of direct *** at lower multiplication complexity,an efficient convolution architecture based on Fermat number transform(FNT) is proposed in this *** first present the FNT algorithm and Overlap-andAdd(Oa A) *** cope with convolution computation in CNNs,the FNT is extended to two-dimensional(2 D) FNT and corresponding calculation methodology is *** pipelined FNT architecture is also proposed for efficient realization of *** an overall architecture of CNN accelerator is given based on Oa A *** analysis has demonstrated that the proposed Oa A FNT convolution method reduces 5.59× and 2.56× of multiplication complexity compared to direct convolution and Oa A FFT *** also conduct evaluation on the FPGA platform Xilinx Virtex-7 XC7 VX485 t and comparison is made with respect to convolution throughput and resource efficiency(GOP/s/DSP).the proposed architecture achieves 1.41× convolution throughput with 3.05× less DSPs compared to the state-of-the-art design.4.29× improvement is gained in terms of the resource efficiency.

关键词： Fermat number transform(FNT) Overlap-and-Add(OaA) pipelining convolutional neural network(CNN)

来源：评论

学校读者我要写书评

暂无评论

A Perspective on Collaboration with Interconnects & Routing in Network on Chip architectures 12

A Perspective on Collaboration with Interconnects & Routing ...

引用

12th International conference on Communication Networks (ICCN) / 12th International conference on Data Mining and Warehousing (ICDMW) / 12th International conference on image and signal processing (ICISP)

作者： Blessington, T. Praveen Bhaskara, Bhanu Basha, Fazal Noor KL Univ Vaddeswaram India Majmaah Univ Coll Comp & Informat Sci Acad City Al Majmaah Saudi Arabia

As VLSI technology advances, the number of modules on a chip multiplies and thus the solutions for on-chip communication are evolving to support the new paradigm in inter-module communication on System on Chip (SOC). those System on Chip, Current chip designs incorporate more complex multilayered and stack segmented interconnection buses with various routing architectures results in a Network on Chip. these, traditional solutions, which were based on a combination of shared-buses and dedicated module-to-module wires, scalability limit, and are no longer adequate for System on Chip/Network on Chip. On-chip architectures have been optimized for a non-chip environment before the multi-core challenge became the focus of processor chip architecture through the latency and the throughput. this evolution of on-chip interconnects may evoke feelings of among networking old-timers. the considerations that have driven data communication from shared buses to packet-switching networks and to routing protocols such as spatial reuse, multi-hop routing, flow and congestion control etc., will inevitably drive the challenges raised in the design of network interfaces with the segmented stack layered mechanism, and potentially managing the critical resources designed for on-chip modules. (C) 2016 Published by Elsevier B.V.

关键词： Multicores Network-on-Chip Router System-on-Chip Xpipes

来源：评论

学校读者我要写书评

暂无评论

Using Fermat number transform to accelerate convolutional neural network

Using Fermat number transform to accelerate convolutional ne...

引用

International conference on ASIC

作者： Weihong Xu Xiaohu You Chuan Zhang National Mobile Communications Research Laboratory Southeast University Nanjing China Lab of Efficient Architectures for Digital-communication and Signal-processing (LEADS)

Convolutional neural network (CNN), has achieved a significant breakthrough on image recognition and natural language processing. However, CNNs still suffer from the prohibitive computation complexity. Many efforts have been made to reduce the arithmetic complexity of direct convolution. Aiming at lower multiplication complexity, an efficient convolution architecture based on Fermat number transform (FNT) is proposed in this paper. We first present the FNT algorithm and Overlap-and-Add (OaA) method. To cope with convolution computation in CNNs, the FNT is extended to two-dimensional (2D) FNT and corresponding calculation methodology is introduced. the pipelined FNT architecture is also proposed for efficient realization of FNT. then an overall architecture of CNN accelerator is given based on OaA FNT. Complexity analysis has demonstrated that the proposed OaA FNT convolution method reduces 5.59× and 2.56× of multiplication complexity compared to direct convolution and OaA FFT method. We also conduct evaluation on the FPGA platform Xilinx Virtex-7 XC7VX485t and comparison is made with respect to convolution throughput and resource efficiency (GOP/s/DSP). the proposed architecture achieves 1.41× convolution throughput with 3.05× less DSPs compared to the state-of-the-art design. 4.29× improvement is gained in terms of the resource efficiency.

关键词： Convolution Two dimensional displays Complexity theory Computer architecture Transforms Acceleration Hardware

来源：评论

学校读者我要写书评

暂无评论

RICO: A low power repetitive iteration CORDIC for DSP applications in portable devices

引用

JOURNAL OF SYSTEMS ARCHITECTURE 2016年 70卷 82-92页

作者： Nawandar, Neha K. Garg, Bharat Sharma, G. K. ABV Indian Inst Informat Technol & Management Gwalior Morena Link RdRoom 112Acad Block Gwalior 474015 India

COordinate Rotation Digital Computer (CORDIC) is a unit that is widely used in the applications such as scientific calculators, signal/image processing, communication systems, robotics, 3-D graphics etc. exhibits huge computations and requires large power. this paper presents an approximate low power Repetitive Iteration CORDIC (RICO) architecture that calculates sine/cosine values very efficiently. In the proposed RICO, number of iterations are fixed and a specific iteration is repeated to reduce the implementation complexity. An additional comparator based logic that evaluates direction of micro-rotation within RICO reduces the data dependency between each iterations. the efficiency of the proposed RICO is evaluated in Discrete Cosine Transform (DCT) by implementing DCT using only three RICO units. Post-synthesis simulation results show that the proposed RICO achieves area and power savings of 37.19% and 94.05% respectively over the Conventional CORDIC at the cost of 29.39% increase in latency. (C) 2016 Published by Elsevier B.V.

关键词： CORDIC Rotation (R-p) Scaling factor (k) Discrete Cosine Transform (DCT) Approximate design

来源：评论

学校读者我要写书评

暂无评论

Low complexity and efficient architecture of 1D-DCT based Cordic-Loeffler for wireless endoscopy capsule

Low complexity and efficient architecture of 1D-DCT based Co...

引用

IEEE SSD International Multi-conference on Systems, signals and Devices

作者： N. Jarray M. Elhaji A. Zitouni Faculty of Sciences of Monastir Electronic and Micro-Electronic Laboratory Tunisa Monastir University Tunisia University of Dammam Saudi Arabia

Due to the power limitation and the small size condition of the wireless capsule endoscopy, therefore the principal defiance is to reduce the area and the power consumption. the aim is to preserve acceptable image reconstruction and coding. In this paper, we present a Low complexity and efficient architecture of 1D-DCT based Cordic-Loeffler technique for wireless capsule endoscopy. Our improvement over the original algorithm is performed in CORDIC part. this brings us to reduce the number of addition operations from 18 to 10. As a result, the number of addition is reduced from 38 to 30 operations in the main algorithm. Also, to more ameliorate our results, we used Modified Carry look Ahead adder (MCLA) and Carry Save Adder (CSA) adder which are characterized by low power and high speed compared to classical Carry Look Ahead adder (CLA). Our aim is to provide an optimized architecture in terms of area and power consumption. the proposed design has been implemented on FPGA. Compared to other architectures, the proposed architecture has not only reduced the computation complexity, but also the area and the power consumption. It should be noted that the proposed DCT architecture is very suitable for low-power and high-quality codecs, especially for battery-based systems.

关键词： Discrete cosine transforms Computer architecture Adders signal processing algorithms Wireless communication Endoscopes Complexity theory

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：