In this paper we address the "rate analysis" problem for media-processing platforms consisting of multiple processor cores connected in a pipelined fashion. More precisely, we aim at determining tight bounds...
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ISBN:
(纸本)0769526764
In this paper we address the "rate analysis" problem for media-processing platforms consisting of multiple processor cores connected in a pipelined fashion. More precisely, we aim at determining tight bounds on the rates at which multimedia streams can be fed into such architectures. these bounds depend on architectural constraints (e.g. the available on-chip memory, bus arbitration policies, etc.), as well as the application characteristics (e.g. application partitioning and mapping, workload rates generated by different tasks, etc.). the proposed framework for rate analysis can be used for fast design space exploration to determine how these bounds change with different architectural parameters, mapping of the application, or changing the QoS requirements associated withthe input streams.
Graphics processing units (GPUs) are becoming increasingly important in today's platforms as their increased generality allows for them to be used as powerfill co-processors. In this paper;we explore possible appl...
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ISBN:
(纸本)9780769545028
Graphics processing units (GPUs) are becoming increasingly important in today's platforms as their increased generality allows for them to be used as powerfill co-processors. In this paper;we explore possible applications for GPUs in real-timesystems, discuss the limitations and constraints imposed by current GPU technology, and present a summary of our research addressing many such constraints.
We present a high performance logging system for embedded UNIX and GNU/Linux applications. Compared to the standard UNIX and GNU/Linux logging method, syslog, our method has two orders of magnitude lower latency and a...
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ISBN:
(纸本)9781479908516
We present a high performance logging system for embedded UNIX and GNU/Linux applications. Compared to the standard UNIX and GNU/Linux logging method, syslog, our method has two orders of magnitude lower latency and an order of magnitude higher message throughput. this speed-up is mainly due to the use of a memory-mapped file as the means of interprocess communication, fewer memory copies and the batching of output messages in the logging daemon. In addition, our logging system also accepts syslog messages, providing compatibility with existing applications. Our logging system is in production use in the Cisco UCS Virtual Interface Card.
Marte (A UML Profilefor Modeling and Analysis of real-time and embeddedsystems) is a new UML profile extension for real-time and embeddedsystems, which is going to be standardized by mid 2007 at OMG (Object Manageme...
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ISBN:
(纸本)9780769528953
Marte (A UML Profilefor Modeling and Analysis of real-time and embeddedsystems) is a new UML profile extension for real-time and embeddedsystems, which is going to be standardized by mid 2007 at OMG (Object Management Group). this standard has been proposed by the "ProMarte" consortium, which consists of OMG end-users, tool providers and academics. Marte defines concepts in terms of UML extensions needed to model and analyze real-time and embeddedsystems (R TIES). the Marte specification provides an annex which handles its relation to AADL-based models, and the way it may represent them.. Our purpose in this paper is to describe this relation. Our constructions will be presented and illustrated through some examples.
Hierarchical scheduling has recently been used to provide temporal isolation to embedded virtualised systems. Response time analysis is a common way to derive a schedulability test these systems. this paper points out...
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ISBN:
(纸本)9780769537870
Hierarchical scheduling has recently been used to provide temporal isolation to embedded virtualised systems. Response time analysis is a common way to derive a schedulability test these systems. this paper points out that response time analysis for hierarchical fixed-priority scheduling found in the literature is only exact for tasks of the highest priority domain. For the rest of the tasks is an upper bound. In our work, we provide the exact analysis and we compare it with previously published works.
this paper presents an approach to the synthesis of secure real-timeapplications mapped on distributed embeddedsystems, which focuses on preventing fault injection attacks. We utilize symmetric cryptographic service...
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ISBN:
(纸本)9781479989379
this paper presents an approach to the synthesis of secure real-timeapplications mapped on distributed embeddedsystems, which focuses on preventing fault injection attacks. We utilize symmetric cryptographic service to protect confidentiality, and deploy fault detection within confidential algorithm to resist fault injection attacks. Several fault detection schemes are identified, and their fault coverage rates and time overheads are derived and measured, respectively. Our synthesis approach makes efforts to determine the best fault detection schemes for the encryption/decryption of messages, such that the overall security strength of resisting fault injection attack is minimized, and the deadline constraint of the real-timeapplications is guaranteed. Since addressing the problem is still a NP-hard problem, we propose an efficient algorithm based on Fruit fly Optimization Algorithm (FOA), which can achieve better results by lower time overheads, compared with simulated annealing algorithm. Extensive experiments demonstrate the superiority of our approach.
Nowadays modern chip multi-cores (CMPs) become more demanding because of their high performance especially in real-timeembeddedsystems. On the other side, bounded latencies has become vital to guarantee high perform...
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ISBN:
(纸本)9781479989379
Nowadays modern chip multi-cores (CMPs) become more demanding because of their high performance especially in real-timeembeddedsystems. On the other side, bounded latencies has become vital to guarantee high performance and fairness for applications running on CMPs cores. We propose a new memory controller that prioritizes and assigns defined quotas for cores within unified epoch (MCES). Our approach works on variety of generations of double data rate DRAM (DDR DRAM). MCES is able to achieve an overall performance reached 35% for 4 cores system.
this paper presents a partially-automated solution for the definition of test oracles for validating Simulink models. Since these models are widely used for the design of embeddedsystems, their thorough validation is...
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ISBN:
(纸本)9781479908516
this paper presents a partially-automated solution for the definition of test oracles for validating Simulink models. Since these models are widely used for the design of embeddedsystems, their thorough validation is key. Errors and misunderstandings in these models may preclude the correctness and reliability of the final system: a manual, human-intensive validation activity is not enough, and automated solutions are fundamental to improve the current state of the art. the paper also presents Apolom, a prototype oracle generator, and the results of two experiments.
Canny algorithm is one of the most popular edge detection algorithms which are used to extract edge features in images. But because of its complicated calculation, using Canny algorithm to detect edges in real-time on...
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ISBN:
(纸本)9781509040933
Canny algorithm is one of the most popular edge detection algorithms which are used to extract edge features in images. But because of its complicated calculation, using Canny algorithm to detect edges in real-time on traditional embeddedsystems becomes a difficult problem. However, current high-end embedded processors which integrate GPGPUs (General Purpose Graphics Processing Units) can provide more computing power for embeddedsystems. this paper proposed a parallel Canny algorithm on the embedded CPU and GPU heterogeneous and collaborative computing system. Experimental results showed that the proposed parallel Canny algorithm brought nearly 50 times speedup on the heterogeneous embeddedsystems and it fully met the needs of real-time.
In work on globally-scheduled soft real-time multiprocessor systems, analysis has been presented for dealing with self-suspensions, but this analysis can be pessimistic. In this paper, we present an approach that is d...
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ISBN:
(纸本)9780769541556
In work on globally-scheduled soft real-time multiprocessor systems, analysis has been presented for dealing with self-suspensions, but this analysis can be pessimistic. In this paper, we present an approach that is designed to improve the schedulability of such systems. In experimental results that are presented, the proposed approach signi cantly improved schedulability in most considered scenarios.
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