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检索条件"任意字段=12th International Conference on Embedded and Real-Time Computing Systems and Applications"

共 3164 条记录，以下是3081-3090 订阅

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Partitioning conditional data flow graphs for embedded system design

Partitioning conditional data flow graphs for embedded syste...

引用

12th IEEE international conference on Application-Specific systems, Architectures, and Processors

作者： Auguin, M Bianco, L Capella, L Gresset, E Univ Nice Sophia Antipolis CNRS F-06903 Sophia Antipolis France

ISBN: (纸本)0769507166

the complexity of embedded applications increases continuously. Integration advances provides a rising range of possibilities to implement a system on a chip. the designers are faced to the difficult challenge to select the right units to implement the application functionalities so that the silicon area is minimized and the time constraints of the application are met. this paper presents an effective method to design system architectures which operates on a conditional data flow, graph which is well suited to represent signal processing applications.

关键词： embedded systems

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Testing embedded real-time systems 7

Testing embedded real-time systems

引用

7th international conference on real time computing systems and applications

作者： En-Nouaary, A Khendek, F Dssouli, R Univ Montreal Dept IRO Montreal PQ H3C 3J7 Canada

ISBN: (纸本)0769509304

An embedded real-time system consists of a number of components (processes) that run concurrently and communicate with each other under predefined tinting constraints. the correctness of such systems is important, since they are used in an increasing number of safety critical systems. To improve the quality of these systems, two techniques can be used, namely verification of the specification and testing of the implementation. III this paper;we consider the testing of embedded real-time components. In our model, the system is modeled as a set of Communicating timed Input Output Automata (CTIOA). One CTIOA specifies the component to be tested and the remaining CTIOAs represent the context. the relationship between the component to be rested and the other ones should be taken into account for test cases generation. We discuss how testing in contest differs from testing in isolation. We review the fault model in the context of CTIOA and we propose an approach for test cases generation from an embedded CTIOA. this approach consists of three steps. Fir st, we avoid the composition of all machines by selecting, based on a specific criterion, only some pal-ts of the CTIOA's contest that affect (or al-e affected by) the specification. then, we deter-mine the pal tial product of the specification and the selected pal-ts of the context. Finally: we apply timed Wp-Method [7] on the resulting rimed input output automata. the quality of the resulting pa, tial product is strongly dependent on the criterion used to select the parts of the contest to consider in test cases generation.

关键词： conformance testing testing in context real-time systems embedded systems timed input output automata communicating timed input output automata

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Using measurements to derive the worst-case execution time 7

Using measurements to derive the worst-case execution time

引用

7th international conference on real time computing systems and applications

作者： Lindgren, M Hansson, H thane, H Malardalen Univ Real Time Res Ctr Vasteras Sweden

ISBN: (纸本)0769509304

Execution time analysis is used in the development of real-time and embedded systems to dei-ive the timing estimates required for schedulability analysis. the execution time of the analyzed program is typically obtained by combining results from program flow analysis (such as number of iterations in loops) with low-level timing information. this paper proposes a method for low-level timing analysis based on measurements of execution times of programs executing on the actual target architecture. the essence of the method is to del-ive a system of linear equations fr om a limited number of timing measurements of an instrumented version of the considered program. the solution to these equations give execution times for program fragments, from which execution time measures for the entire program can be derived. the main advantage with this approach is that architectural modeling is not needed, hence the risk of a discrepancy between model and real system is avoided. Also, compared to the non-exhaustive measurements performed in industry today, our approach is more structured and gives complete cover age in terms of the program paths considered. We present our method in the context of a simple, but reasonably realistic, processor model and show how it cart be extended to architectures with pipelines.

关键词： Context modeling embedded system Equations Information analysis Instruments Job shop scheduling Performance evaluation real time systems time measurement Timing

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A framework to model dependable real-time systems based on real-time object model 7

A framework to model dependable real-time systems based on r...

引用

7th international conference on real-time computing systems and applications, RTCSA 2000

作者： Lim, Hyung-Taek Yang, Seung-Min Dept. of Comput. Soongsil Univ. Korea Republic of School of Computing Soongsil Univ. Korea Republic of

ISBN: (纸本)0769509304

Proposes a framework to model fault-tolerant real-time systems consisting of RobustRTOs (Robust real-time Objects) and RMOs (Region Monitor real-time Objects). A RobustRTO is an object which is capable of tolerating faults in itself. Many existing fault-tolerant mechanisms, such as RB (recovery blocks) and NVP (N-version programming), are modeled as RobustRTOs. An RMO is an object which is capable of monitoring a set of objects, named regions. the RMO detects any abnormal behavior of the objects within a region, diagnoses the symptoms and performs appropriate recovery and/or reconfiguration. Although the concepts of RobustRTOs and RMOs are introduced based on a real-time object model, we believe they are applicable to the modeling and design of any dependable embedded real-time system. © 2000 IEEE.

关键词： real time systems

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Proceedings - 7th international conference on real-time computing systems and applications, RTCSA 2000

Proceedings - 7th International Conference on Real-Time Comp...

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7th international conference on real-time computing systems and applications, RTCSA 2000

ISBN: (纸本)0769509304

the proceedings contain 69 papers. the topics discussed include: schedulability-aware mapping of real-time object-oriented models to multi-threaded implementations;using measurements to derive the worst-case execution time;extracting safe and precise control flow from binaries;low-level analysis of a portable Java byte code WCET analysis framework;dynamic memory management for real-time embedded Java chips;efficient pure-buffer algorithms for real-time systems;a comparative study of the realization of rate-based computing services in general purpose operating systems;chopping and versioning real-time transactions to avoid remote blocking;efficient resource management for hard real-time communication over differentiated services architectures;minimizing the maximum end-to-end delay on tree structure using the distributed pinwheel model;and a multi-server design for a distributed mpeg video system with streaming support and QoS control.

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Explicit SIMD programming for asynchronous applications

Explicit SIMD programming for asynchronous applications

引用

12th IEEE international conference on Application-Specific systems, Architectures, and Processors

作者： Di Bias, A Hughey, R Univ Calif Santa Cruz Baskin Sch Engn Dept Comp Engn Santa Cruz CA 95064 USA

ISBN: (纸本)0769507166

this paper presents the SIMD Phase Programming Model, a simple approach to solving asynchronous, irregular problems on massively parallel SIMD computers. the novelty of this model consists of a simple, clear method on how to turn a general serial program into an explicitly parallel one for a SIMD machine, transferring a portion of the flow control into the single PEs. three case studies (the Mandelbrot Set, the N-Queen problem, and a Hopfield neural network that approximates the maximum clique in a graph) will be presented, implemented on two different SIMD computers (the UCSC Kestrel and the MasPar MP-2). Our results so far show good performance with respect to conventional serial CPU computing time and in, terms of the high parallel speedup and efficiency achieved.

关键词： Computer programming

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Architecture of the simplified Chinese embedded system STARth 4

Architecture of the simplified Chinese embedded system START...

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4th international conference/Exhibition on High Performance computing in the Asia-Pacific Region, HPC-Asia 2000

作者： Mao, P.X. Tang, Zhizhong Chen, M. Zhang, Youming Zhang, Vern Computer Science Department Tsinghua University Beijing100084 China Start Computer Group Co. Ltd. Fuzhou350002 China

ISBN: (纸本)0769505902

there is a trend for the information products that are integrated by computer, communication, and consumer electronics. the OS is required more compact and practical. An embedded system STARth is developed based on the core of the Motorola PPSM that is a real time 32-bit kernel with prioritized interrupt scheduling. All tasks are interrupt-driven. the PPSM kernel does not access hardware device directly. the kernel controls all peripherals indirectly, through software device drivers. the PPSM tools consist of pen input, graphics, database, text, character input, system and communication. the PPSM toolsets, together with its device drivers, provides the basic contro of the LCD, the drawing functions, the real time clock and the UART. the architecture of the embedded system STARth on the Dragon Ball EZ platform is discussed in parts in details. the development environments of both software and hardware are described. the system is analyzed from its initialization, registration to system management, even the applications programming. the STARth is tested and run on the hardware system of Dragon Ball platform. It is found that STARth is practical and reliable for personal information devices. © 2000 IEEE.

关键词： embedded systems

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Towards validated real-time software

Towards validated real-time software

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Euromicro conference on real-time systems

作者： V. Bertin M. Poize J. Pulou J. Sifakis Alcatel Business Systems Colombes France France Télécom Centre National dE28099Étude des Télécommunications Meylan France VERIMAG Centre Equation Gieres France

We present a tool for the design and validation of embedded real time applications. the tool integrates two approaches: the use of the synchronous programming language, ESTEREL for design, and the application of model checking techniques for validation of real time properties. Validation is carried out on a global formal model (timed automata) taking into account the effective implementation of the application on the target hardware architecture as well as its external environment behavior.

关键词： embedded computing Automata Equations Computer languages Computer applications Costs Software tools Electrical capacitance tomography Application software Timing

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Concurrent embedded real-time software verification

Concurrent embedded real-time software verification

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IEEE Annual international Computer Software and applications conference (COMPSAC)

作者： Pao-Ann Hsiung Institute of Information Science Academia Sinica Taiwan

the verification of software is more complex than hardware due to inherent flexibilities (dynamic behavior) that incur a multitude of possible system states. the verification of Concurrent embedded real-time Software (CERTS) is all the more difficult due to its concurrency and embeddedness. the work presented shows how the complexity of CERTS verification can be reduced significantly through answering common engineering questions such as when, where, and how one must verify embedded software. Application examples illustrate the usefulness of our technique in increasing verification scalability.

关键词： embedded software Concurrent computing Processor scheduling Control system synthesis Scalability Software systems embedded computing Information science Formal verification real time systems

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Efficient algorithms for model checking pushdown systems 12th

Efficient algorithms for model checking pushdown systems

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12th international conference on Computer Aided Verification, CAV 2000

作者： Esparza, Javier Hansel, David Rossmanith, Peter Schwoon, Stefan Technische Universität München Arcisstr. 21 München80290 Germany

ISBN: (纸本)3540677704

We study model checking problems for pushdown systems and linear time logics. We show that the global model checking problem (computing the set of configurations, reachable or not, that violate the formula) can be solved in O(gPgP3gBgB3) time and O(gPgP2gBgB2) space, where gPgP and gBgB are the size of the pushdown system and the size of a Büchi automaton for the negation of the formula. the global model checking problem for reachable configurations can be solved in O(gPgP4gBgB3) time and O(gPgP4gBgB2) space. In the case of pushdown systems with constant number of control states (relevant for our application), the complexity becomes O(gPgPgBgB3) time and O(gPgPgBgB2) space and O(gPgP2gBgB3) time and O(gPgP2gBgB2) space, respectively. We show applications of these results in the area of program analysis and present some experimental results. © Springer-Verlag Berlin Heidelberg 2000.

关键词： Model checking

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