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检索条件"任意字段=13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications"

共 2022 条记录，以下是101-110 订阅

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Response-time analysis of mixed criticality systems with pessimistic frequency specification

Response-time analysis of mixed criticality systems with pes...

引用

ieee 19th international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Baruah, Sanjoy Chattopadhyay, Bipasa Univ N Carolina Chapel Hill NC 27515 USA

ISBN: (纸本)9781479908516

In modern embedded platforms, safety-critical functionalities that must be certified correct to very high levels of assurance may co-exist with less critical software that are not subject to certification requirements. One seeks to satisfy two, sometimes contradictory, goals upon such mixed-criticality platforms: (i) certify the safety-critical functionalities under very conservative assumptions, and (ii) achieve high resource utilization during run-time, when actual behavior does not live up to the pessimistic assumptions under which certification was made. this paper describes efforts at designing fixed-priority scheduling algorithms that balance these two requirements, when scheduling recurrent tasks that are triggered by external events of unknown exact frequency.

关键词： Scheduling algorithms

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Worst-Case Memory Traffic Analysis for Many-Cores using a Limited Migrative Model

Worst-Case Memory Traffic Analysis for Many-Cores using a Li...

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ieee 19th international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Nikolic, Borislav Yomsi, Patrick Meumeu Petters, Stefan M. ISEP IPP CISTER INESC TEC Oporto Portugal

ISBN: (纸本)9781479908509

the ratio between the number of cores and memory subsystems (i.e. banks and controllers) in many-core platforms is constantly increasing, leading to non-negligible latencies of memory operations. thus, in order to study the worst-case execution time of an application, it is no longer sufficient to only take into account its computational requirements, but also have to be considered latencies related to its memory operations. In this paper we study a limited migrative model applied upon many-core platforms. this approach is based on a multi-kernel paradigm [3] - a promising step towards scalable and predictable many-cores, which are essential prerequisites for the integration of such systems into the real-time embedded domain. Under that assumption, we present two analytical methods to obtain the worst-case memory traffic delays of individual applications. through experiments we test the applicability of the proposed approaches to different scenarios, and draw practical conclusions concerning routing mechanisms and a distribution of memory operations across memory controllers.

关键词： real time systems

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Inline Emulation for Paravirtualization Environment on embedded systems

Inline Emulation for Paravirtualization Environment on Embed...

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1st international Workshop on Cyber-Physical systems, Networks, and applications (CPSNA) held during 17th ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Lee, Yuan-Cheng Hsueh, Chih-Wen Chang, Rong-Guey Natl Taiwan Univ Dept Comp Sci & Informat Engn Taipei 106 Taiwan Natl Chung Cheng Univ Dept Comp Sci & Informat Engn Chiayi 621 Taiwan

ISBN: (纸本)9780769545028

Virtualization has been widely adopted on servers for various purposes such as server consolidation, cloud computing, and so on. Recent years, the trend spreads on embedded systems, although it once seemed to be an impractical idea because of the limited capability of embedded processors. To further lower the overhead of adopting virtualization on embedded systems, we design an optimization technique, called inline emulation, to reduce the cost spending on paravirtualizing operating systems. Inline emulation can also be used in various virtualization environments to increase the performance of emulating privileged instructions. We implement inline emulation for ARMv5 architecture and evaluate in Android Emulator. the result shows it runs much faster, up to 7.4 times, than the common paravirtualization technique for cache-related operations and suggests that it not only lowers the development cost but also increases system responsiveness.

关键词： embedded systems inline emulation paravirtualization virtualization embedded systems Virtualization simulating Servers Methyltestosterone Androids

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Dynamic thermal and timeliness Guarantees for Distributed real-time embedded systems

Dynamic Thermal and Timeliness Guarantees for Distributed Re...

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15th ieee international conference on embedded and real-time computing systems and applications

作者： Fu, Xing Wang, Xiaorui Puster, Eric Univ Tennessee Dept Elect Engn & Comp Sci Knoxville TN 37996 USA

ISBN: (纸本)9780769537870

Distributed real-time embedded systems have stringent requirements for key performance properties, such as end-to-end timeliness and reliability, in order to operate properly. In recent years, with the continuously decreasing feature size and increasing demand for computation capabilities, today's real-time embedded systems face an increasing probability of overheating and even thermal failures. As a result, their temperature must be explicitly controlled for improved reliability. While a variety of control algorithms have been proposed for either real-time guarantees or thermal management in an isolated manner;this paper proposes a coordinated control solution that can provide simultaneous thermal and timeliness guarantees for distributed real-time embedded systems running in unpredictable environments. Our control solution features a novel coordination design, which allows the thermal and timeliness control loops to run on their respective desired small timescales for prompt control actions and yet achieve theoretically guaranteed control accuracy and system stability. In addition, while most existing work relies solely on simulations, we present empirical results on a physical testbed to demonstrate the efficacy of our control solution.

关键词： System stability

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Enhancing Security of embedded Linux on a Multi-core Processor

Enhancing Security of Embedded Linux on a Multi-core Process...

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作者： Li, Ning Kinebuchi, Yuki Nakajima, Tatsuo Waseda Univ Dept Comp Sci & Engn Tokyo Japan

ISBN: (纸本)9780769545028

While recent embedded systems start to own more and more functionalities, security requirements become more and more important. In this paper we propose an approach to enhance the security of embedded systems. In this approach SPUMONE, a thin virtualization layer, is selected to build a multi-OS environment for its low overhead. Xv6 runs as trusted OS for executing the monitoring service that detects the violation of the integrity of the Linux kernel while Linux as a general purpose OS. the monitoring service checks whether Linux is compromised or not. A secure pager that offers the spatial isolation based on the core-local memory is proposed to protect the integrity of the xv6 kernel located in the main memory, which can make Linux and xv6 run in high security level.

关键词： embedded systems Kernel Linux Linux Monitoring Random access memory SPUMONE Security Virtual machine monitors core-local memory embedded Linux embedded system embedded systems multicore processor multiprocessing systems security security of data security requirements virtualization virtualization layer

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Graph transformations and derivation of scheduling constraints applied to the mapping of real-time distributed applications 13

Graph transformations and derivation of scheduling constrain...

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ieee 13th international Symposium on embedded Multicore/Many-Core systems-on-Chip (MCSoC)

作者： Louise, Stephane CEA LIST PC172Bat 862 F-91191 Gif Sur Yvette France

ISBN: (纸本)9781728148823

Synchronous Data-Flow as a deterministic variation of Khan Process Networks is a good model for distributed applications that allows for verification of the properties of the applications both at the design level and at run-time. real-time extensions exist which allow to specify real-time clocks for some of the processes in the graph. With the addition of real-time clocks, the behavior of the complete system can be easily differentiated from a nominal real-time mode where all the required data for processing is available when a clock tick occurs, and an error mode can be triggered when the condition is not met. Our contribution in this paper is -first- to show a set of graph transformations that allow to account for the execution and communication time on a real platform while at the same time maximizing the parallelism of execution and -second-on top of these transformations to provide the execution constraints as a linear program that must be met at run-time to guarantee the real-time requirements. It is illustrated on a subset of a real-life automotive example.

关键词： Distributed and Heterogeneous systems Synchronous Data-Flow Graph Transformations

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Dynamic Voltage and Frequency Scaling for real-time Scheduling on a Prioritized SMT Processor

Dynamic Voltage and Frequency Scaling for Real-Time Scheduli...

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作者： Fujii, Kei Chishiro, Hiroyuki Matsutani, Hiroki Yamasaki, Nobuyuki Keio Univ Dept Comp Sci Grad Sch Sci & Technol Yokohama Kanagawa Japan

ISBN: (纸本)9780769545028

Cyber Physical systems are composed of many embedded systems which monitor and control the physical processes for tight integrations of computation and physical processes. Such embedded systems require not only real-time capabilities but also high throughput and low power consumption. High throughput is mainly achieved by parallel architectures such as Simultaneous Multithreading (SMT) and Chip Multiprocessor (CMP), and low power consumption is mainly achieved by real-time Dynamic Voltage and Frequency Scaling (RT-DVFS) under the real-time constraint. In this paper, we present a RT-DVFS algorithm called Hetero Efficiency to Logical Processor (HeLP) which can reduce power consumption easily and effectively in prioritized SMT processors. We also present Hetero Efficiency to Logical Processor with Temporal Migration (HeLP-TM) which applies the temporal migration technique to HeLP. Simulation results show that HeLP can reduce power consumption effectively and HeLP-TM is more effective than HeLP.

关键词： real-time Dynamic Voltage and Frequency Scaling Prioritized SMT Processor embedded and real-time systems RMT Processor

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Voltage Assignment for Soft real-time embedded systems with Continuous Probability Distribution

Voltage Assignment for Soft Real-Time Embedded Systems with ...

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15th ieee international conference on embedded and real-time computing systems and applications

作者： Qiu, Meikang Wu, Jiande Hu, Fei Liu, Shaobo Wang, Lingfeng Univ Kentucky Dept Elect & Comp Engn Lexington KY 40506 USA Univ New Orleans Dept Elect & Comp Engn New Orleans LA 70148 USA Univ Alabama Dept Elect & Comp Engn Tuscaloosa AL 35487 USA SUNY Binghamton Dept Elect & Comp Engn Binghamton NY 13902 USA Texas A&M Univ Dept Elect & Comp Engn College Stn TX 77843 USA

ISBN: (纸本)9780769537870

Energy saving is critical to real-time embedded systems. In many embedded systems, some tasks contain conditional instructions or operations that could have different execution times for different inputs. Due to the uncertainties in execution time of these tasks, this paper models each varied execution time as a probabilistic random variable. We propose a practical algorithm to minimize the expected value of total energy consumption while satisfying the timing constraint with a guaranteed confidence probability for uniprocessor embedded systems with continuous probability distributions. the experimental results show that our approach achieves significant energy saving than previous work.

关键词： Probability continuous energy dynamic voltage scaling real-time

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A Cascading Redundancy Approach for Dependable real-time systems

A Cascading Redundancy Approach for Dependable Real-Time Sys...

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15th ieee international conference on embedded and real-time computing systems and applications

作者： Aysan, Huseyin Dobrin, Radu Punnekkat, Sasikumar Malardalen Univ Malardalen Real Time Res Ctr Vasteras Sweden

ISBN: (纸本)9780769537870

Dependable real-lime systems typically consist of tasks of multiple criticality levels and scheduling them in a fault-tolerant manner is a challenging problem. Redundancy in the physical and temporal domains for achieving fault tolerance has been often dealt independently based on the types of errors one needs to tolerate. To our knowledge, there had been no work which tries to integrate fault tolerant scheduling and multiple redundancy mechanisms. In this paper we propose a novel cascading redundancy approach within a generic fault tolerant scheduling framework. the proposed approach is capable of tolerating errors with a wider coverage (with respect to error frequency and error types) than time and space redundancy in isolation, allows tasks with mixed criticality levels, is independent of the scheduling technique and, above all, ensures that every critical task instance can be feasibly replicated in both time and space.

关键词： Redundancy

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Utilization-controlled Task Consolidation for Power Optimization in Multi-Core real-time systems

Utilization-controlled Task Consolidation for Power Optimiza...

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作者： Fu, Xing Wang, Xiaorui Univ Tennessee Dept Elect Engn & Comp Sci Knoxville TN 37996 USA

ISBN: (纸本)9780769545028

Since multi-core processors have become a primary trend in processor development, new scheduling algorithms are needed to minimize power consumption while achieving the desired timeliness guarantees for multi-core (and many-core) real-time embedded systems. Although various power/energy-efficient scheduling algorithms have recently been proposed, existing studies may have degraded run-time performance in terms of power/energy efficiency and real-time guarantees when applied to real-time embedded systems with uncertain execution times. In this paper, we propose a novel online solution that integrates core-level feedback control with processor-level optimization to minimize both the dynamic and leakage power consumption of a multi-core real-time embedded system. Our solution monitors the utilization of each CPU core in the system and dynamically responds to unpredictable execution time variations by conducting per-core voltage and frequency scaling. We then perform task consolidation on a longer timescale and shut down unused cores for maximized power savings. Both empirical results on a hardware multi-core testbed with well-known benchmarks and simulation results in many-core systems show that our solution provides the desired real-time guarantees while achieving more power savings than three state-of-the-art algorithms.

关键词： Multicore processing real time systems Power demand Optimization embedded systems Resource management Frequency control

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