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A thread Speed Control Scheme for real-time Microprocessors

A Thread Speed Control Scheme for Real-Time Microprocessors

引用

ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Kohei Matsumoto Hiroyuki Umeo Nobuyuki Yamasaki Department of Computer Science Keio University Yokohama Japan

real-time execution of applications is one of key requirements for Cyber-Physical systems (CPS) that integrate computational and physical elements for our social infrastructure, such as robotics, transportation, and consumer appliances. In such real-time systems, a task must be executed so as not to violate given time constraints. Moreover, it is desirable that the execution time of the task is predictable precisely. When Out-of-Order (OoO) execution is adopted for real-time systems to enhance the performance, it is much difficult to predict execution time because of the feature of OoO execution. In order to deal with this problem, various schemes were proposed such as IPC control mechanism of Responsive Multithreaded (RMT) Processor. RMT Processor is a real-time microprocessor adopting simultaneous multithreading (SMT) architecture with OoO execution. Its IPC control mechanism which tries to adjust the number of instruction commits to meet a given target IPC. the IPC control scheme can be implemented not only on RMT Processor but also on various processors and can improve the predictability of execution time. However, if an error between target and actual IPCs is observed, it cannot cancel the error in the next control window, which is used in the control mechanism. Since such uncorrected errors are accumulated in the successive control window, the predictability of the execution time is degraded gradually. To overcome this problem, in this paper, we propose a thread speed control scheme for real-time microprocessors. this scheme is based on the IPC control mechanism on RMT Processor. Our proposed thread speed control scheme calculates an error between reference and actual IPCs, then it dynamically updates the reference IPC of the next control window in order to cancel the past errors. Our proposed scheme is designed and implemented on RMT Processor. the simulation results show that the error is reduced to 2.60 × 10 -5 % in case that four threads are executed simu

关键词： Velocity control Instruction sets real time systems Clocks Process control Registers Computer architecture

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real-time stereoscopic streaming of robotic surgeries

Real-time stereoscopic streaming of robotic surgeries

引用

international conference on e-health Networking, applications and Services (HealthCom)

作者： Jiri Navratil Milan Sarek Sven Ubik Jiri Halak Petr Zejdl Pavel Peciva Jan Schraml CESNET Czech Republic CESNET CTU Czech Republic Masaryk Hospital Czech Republic

Modern robotic surgery using stereoscopic video views of surgical elements can also enable novel E-health applications, such as remote medical students training or presentations of surgical procedures on symposia. the requirement is that such video signals are transmitted remotely in high quality and low latency. In this paper we describe our experience with real-time long distance stereoscopic transmissions of robotic surgeries using a system for low latency streaming over packet networks that we have developed.

关键词： Streaming media Surgery real time systems Stereo image processing High definition video Robots three dimensional displays

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real-time Intrusion Detection and Tracking in Indoor Environment through Distributed RSSI Processing

Real-Time Intrusion Detection and Tracking in Indoor Environ...

引用

ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Ossi Kaltiokallio Maurizio Bocca Department of Automation and Systems Technology Aalto University School of Electrical Engineering Helsinki Finland

In the context of wireless sensor networks, the received signal strength indicator has been traditionally exploited for localization, distance estimation, and link quality assessment. Recent research has shown that, in indoor environments where nodes have been deployed, variations of the signal strength can be exploited to detect movements of persons. Moreover, the time histories of the received signal strength indicator of multiple links allow reconstructing the paths followed by the persons inside the monitored area. this approach, though effective, requires the transmission of multiple, raw received signal strength indicator time histories to a central sink node for off-line analysis. this consistently increases the latency and power consumption of the system. this work aims at applying distributed processing of the received signal strength indicator for indoor surveillance purposes. through distributed processing, the nodes are able to autonomously detect and localize moving per-sons. the latency and power consumption of the system are minimized by transmitting to the sink node only the alerts related to significant events. Moreover, power consumption is further reduced through a high accuracy time synchronization protocol, which allows the nodes to keep the radio off for 60% of the time. During the tests, the system was able to detect the intrusion of a person walking inside the monitored area and to correctly track his movements in real-time with a 0.22 m average error. Possible applications of this application include surveillance of critical areas in buildings, enhancement of workers safety in factories, support to emergency workers or police forces in locating people e.g. during fires, hostage situations or terrorist attacks.

关键词： Synchronization Monitoring Accuracy real time systems Wireless sensor networks Power demand Intrusion detection

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Energy-Aware Partitioned Fixed-Priority Scheduling for Chip Multi-processors

Energy-Aware Partitioned Fixed-Priority Scheduling for Chip ...

引用

ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Arvind Kandhalu Junsung Kim Karthik Lakshmanan Ragunathan Rajkumar Department of Electrical and Computer Engineering Carnegie Mellon University Pittsburgh USA Carnegie Mellon University Pittsburgh PA US

Energy management is becoming an increasingly important problem in application domains ranging from embedded devices to data centers. In many such systems, multi-core processors are projected as a promising technology to achieve improved performance with a lower power envelope. Managing the application power consumption under timing constraints poses significant challenges in these emerging platforms. In this paper, we study the energy-efficient scheduling of periodic real time tasks with implicit deadlines on chip multi-core processors (CMPs). We specifically consider processors with a single voltage and clock frequency domain, such as the state-of-the-art embedded multi-core NVIDIA Tegra 2processor and enterprise-class processors such as Intel'sItanium 2, i5, i7 and IBM's Power 6 and Power 7series. the major contributions of this work are (i)we prove that Worst-Fit-Decreasing (WFD) task partitioning when Rate-Monotonic Scheduling (RMS) is used has an approximation ratio of 1.71 for the problem of minimizing the schedulable operating frequency with partitioned fixed-priority scheduling, (ii) we illustrate the major shortcoming of WFD with RMS resulting from not considering task periods during allocation, and(iii) we propose a Single-clock domain multi-processor Frequency Assignment Algorithm (SFAA) that determines a globally energy-efficient frequency while including task period relationships. Our evaluation results show that SFAA provides significant energy gains when compared to WFD. In fact SFAA is shown to save up to 55% more power compared to WFD for an octa-core processor.

关键词： Program processors Partitioning algorithms Multicore processing real time systems Processor scheduling Clocks Energy consumption

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A Reliability Enhancement Mechanism for High-Assurance MLC Flash-Based Storage systems

A Reliability Enhancement Mechanism for High-Assurance MLC F...

引用

ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Irfan F. Mir Alistair A. McEwan Department of Engineering University of Leicester Leicester

Solid State Devices (SDDs) are replacing mechanical data storage devices such as Hard Disk Drives (HDDs). On the other hand the data reliability in these systems is being questioned due to the fast growth in flash technology such as Multi-Level Cell (MLC). Recently it has been revealed that the Bit Error Rate (BER) increases exponentially in MLC flash memories as they experience more flash writes. Additionally RAID in flash-based storage systems has an inherent problem, that all flash devices should not reach end of life at the same time. Diff-RAID [2] overcomes the said problem. However, Diff-RAID mechanism suffers from drastic age-variation especially during the first few replacements, a problem that has been identified and addressed in this research. A new reliability enhancement mechanism for high-assurance MLC flash-based storage systems has been proposed here, and is compared with published Diff-RAID results. Our mechanism has shown promising results. In terms of convergence, the proposed scheme is 7 times faster. Furthermore, no single device crosses 66% of the age (i.e. max. erasure cycles), unlike the Diff-RAID where in the first few replacements, few devices reach 70-80% of age, which is great improvement in terms of data reliability.

关键词： Ash Arrays Reliability Convergence Aging Bit error rate Flash memory

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Design and Implementation of On-Chip Adaptive Router with Predictor for Regional Congestion

Design and Implementation of On-Chip Adaptive Router with Pr...

引用

ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Masakazu Taniguchi Hiroki Matsutani Nobuyuki Yamasaki Department of Computer Science Keio University Yokohama Japan

Many-core processor is one of attractive solutions to Cyber-Physical systems (CPS) that demands high computational power since it can enclose many computational elements into a single physical chip. Network-on-Chip (NoC) that connects the processing cores is the key in terms of the cost, performance, and power in such systems. Although NoCs typically employ simple deterministic routing algorithms in order to reduce the complexity of on-chip routers, such deterministic algorithms do not avoid traffic congestion and thus the network throughput is degraded when the traffic pattern has localities. On the other hand, complex algorithms require large hardware cost and will be a problem for CPS whose hardware cost is limited. In this paper, we propose an adaptive on-chip router with Predictor for Regional Congestion (PRC) in order to improve the network throughput with modest hardware overhead. the proposed PRC routers exchange their past and predicted future congestion information with each other. then, each router synthesizes its regional congestion information based on the local and received information in order to route packets without congestion. the simulation results show that the proposed routers improve the average throughput by 17.2% compared to a congestion-aware router that employes local information only. the RTL design of the proposed router shows that the area overhead is only 2.6% and additional wiring requirement for each router port is only three.

关键词： Routing Hardware Transmitters throughput Algorithm design and analysis Prediction algorithms Adaptive systems

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Ubiquitous WBAN-based Electrocardiogram monitoring system

Ubiquitous WBAN-based Electrocardiogram monitoring system

引用

international conference on e-health Networking, applications and Services (HealthCom)

作者： Elham Dolatabadi Serguei Primak Western University London ON CA Department of Electrical and Computer Engineering The University of Western Ontario London ON Canada

this paper presents a remote patient monitoring system within the scope of Body Area Network standardization. In this regime, wireless sensor networks are used to continuously acquire the patient's Electrocardiogram signs and transmit data to the base station via ieee.802.15. the personal Server (PS) which is responsible to provide real-time displaying, storing, and analyzing the patient's vital signs is developed in MATLAB. It also transfers ECG streams in real-time to a remote client such as a physician or medical center through internet. the PS has the potential to be integrated with home or hospital computer systems. A prototype of this system has been developed and implemented. the developed system takes advantage of two important features for healthcare monitoring: (i) ECG data acquisition using wearable sensors and (ii) real-time data remote through internet. the fact that our system is interacting with sensor network nodes using MATLAB makes it distinct from other previous works.

关键词： Electrocardiography real time systems Wireless sensor networks Monitoring Servers Iris Base stations

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Using SOA in Critical-embedded systems

Using SOA in Critical-Embedded Systems

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ieee/ACM Int'l conference on & Int'l conference on Cyber, Physical and Social computing (CPSCom) Green computing and Communications (GreenCom)

作者： Douglas Rodrigues Rayner de Melo Pires Julio Cezar Estrella Emerson Alberto Marconato Onofre Trindade Junior Kalinka Regina Lucas Jaquie Castelo Branco Institute of Mathematics and Computer Science University of São Paulo São Carlos SP Brazil

Service-Oriented Architecture (SOA) are having a widespread use in enterprise computing applications, being Web services the most common implementation. the use of SOA has also been proposed for embedded systems, although very little could be found in the literature on the use of SOA for Safety-Critical embedded systems. this paper discusses the use of SOA for the development of this class of systems. Safety-critical embedded systems have specific requirements such as high reliability and real time response, making the use of SOA more challenging than for standard applications. Furthermore, this paper proposes a new form of segregating the UAV mission from the vehicle itself. In order to separate the mission of the plane the MOSA - Mission Oriented Sensors Array - is proposed, an array of sensors oriented to missions that is plugged into the aircraft so as to leave it totally independent of the payload. the techniques proposed in this paper not only aim to facilitate the development of applications but also allow different tasks to be performed simply switching such sensors and their association with the aircraft.

关键词： Service oriented architecture embedded systems Aircraft Sensor arrays

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EMMON: A WSN System Architecture for Large Scale and Dense real-time embedded Monitoring

EMMON: A WSN System Architecture for Large Scale and Dense R...

引用

ieee/IFIP international conference on embedded and Ubiquitous computing, EUC

作者： Stefano Tennina Melanie Bouroche Pedro Braga Ricardo Gomes Mario Alves Farrukh Mirza Vincenzo Ciriello Gabriella Carrozza Pedro Oliveira Vinny Cahill CISTER Research Center Polytechnic Institute of Porto Porto Portugal Distributed Systems Group Department of Computer Science Trinity College Dublin Dublin Ireland Critical Software S. A. Coimbra Portugal SESM scarl Naples Italy

Wireless sensor networks (WSNs) have attracted growing interest in the last decade as an infrastructure to support a diversity of ubiquitous computing and cyber-physical systems. However, most research work has focused on protocols or on specific applications. As a result, there remains a clear lack of effective, feasible and usable system architectures that address both functional and non-functional requirements in an integrated fashion. In this paper, we outline the EMMON system architecture for large-scale, dense, real-time embedded monitoring. EMMON provides a hierarchical communication architecture together with integrated middleware and command and control software. It has been designed to use standard commercially-available technologies, while maintaining as much flexibility as possible to meet specific applications requirements. the EMMON architecture has been validated through extensive simulation and experimental evaluation, including a 300+ node test-bed, which is, to the best of our knowledge, the largest single-site WSN test-bed in Europe to date.

关键词： Wireless sensor networks Computer architecture Protocols Middleware Monitoring Peer to peer computing Scalability

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thermal-Aware Scheduling of Critical applications Using Job Migration and Power-Gating on Multi-core Chips

Thermal-Aware Scheduling of Critical Applications Using Job ...

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ieee international conference on Trust, Security and Privacy in computing and Communications (TrustCom)

作者： Buyoung Yun Kang G. Shin Shige Wang EECS Department University of Michigan Ann Arbor MI USA General Motors Global R& D Warren MI USA

Multi-core System-on-Chip (SoC) has become a popular execution platform for many embedded real-time systems. As CMOS transistors continue to shrink down to the nanoscale regime, it becomes more susceptible to various reliability threats mainly due to thermal hotspots. To improve the reliability of embedded real-time systems, dynamic thermal management (DTM) is required for mission/safety- critical applications running on a multi-core chip to avoid possible thermal hazards while meeting the applications' timing constraints. In this paper, we propose an efficient runtime thermal- aware scheduler (TAS) using job-migration and power-gating techniques to avoid the thermal hotspots on a multi-core chip. Before runtime, the TAS distributes the periodic real-time tasks to cores using the tasks' execution profiles to balance the utilization of functional units on the chip. At runtime, the TAS periodically monitors the core temperatures and triggers one of the following pre-defined thermal management schemes depending on the level of the measured core temperature: (i) migrating jobs running on hot cores to other cooler cores to reduce the workloads on the hot cores, or (ii) turning off hot cores for a certain period of time to cool them down. All tasks' timing constraints are guaranteed during the job migrations and powering cores on/off. Our in-depth evaluation has shown that the proposed TAS can effectively minimize the thermal hotspots on a multi-core chip without violating any application timing constraint.

关键词： Runtime Multicore processing Temperature measurement thermal management Timing Temperature sensors real time systems

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