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检索条件"任意字段=13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications"

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Interactive back-annotation of worst-case execution time analysis for Java microprocessors

Interactive back-annotation of worst-case execution time ana...

引用

13th ieee international conference on embedded and real-time computing systems and applications

作者： Harmon, Trevor Klefstad, Raymond Univ Calif Irvine Henry Samueli Sch Engn Dept Elect Engn & Comp Sci Irvine CA USA

ISBN: (纸本)9780769529752

As real-time systems become more prevalent, there is a need to guarantee that these increasingly complex systems perform as designed. One technique involves a static analysis to place an upper bound on worst-case execution time (WCET). Tools for conducting this analysis typically require the developer to digest assembly opcodes, hexadecimal addresses, and other low-level details in order to make sense of the results. Java-specific processors offer a way out of this complexity. Such processors make Java software more predictable, and as a consequence, timing analysis of a real-time system becomes less computationally intensive. WCET analysis tools based on these processors can thus offer more powerful features at higher levels of abstraction. As proof of this concept, we present a tool for static WCET analysis of Java processors. Our performance measurements show that this tool makes WCET analysis interactive, offering continuous feedback to the developer in the form of back-annotations.

关键词： real time systems

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COMDES-II: A component-based framework for generative development of distributed real-time control systems

COMDES-II: A component-based framework for generative develo...

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13th ieee international conference on embedded and real-time computing systems and applications

作者： Ke, Xu Sierszecki, Krzysztof Angelov, Christo Univ Southern Denmark Mads Clausen Inst Prod Innovat Grundtvigs 150 DK-6400 Sonderborg Denmark

ISBN: (纸本)9780769529752

the paper presents a generative development methodology and component models of COAIDES-II, a component-based software framework for distributed embedded control systems with real-time constraints. the adopted methodology allows for rapid modeling and validation of control software at a higher level of abstraction, from which a system implementation in C can be automatically synthesized. To achieve this objective, COAMES-II defines formally various kinds of components to address the critical requirements Of the targeted domain, taking into consideration both the architectural and behavioral aspects of the system. Accordingly, a system can be hierarchically composed from reusable components with heterogeneous models of computation, whereas behavioral aspects of interest are specified independently, following the principle of separation-of-concerns. the paper introduces the established generative methodology for COAMES-II from a general perspective, describes the component models in details and demonstrates their application through a DC-Motor control system case study.

关键词： DC motors

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Fast recovery and QoS assurance in the presence of network faults for mission-critical applications in hostile environments

Fast recovery and QoS assurance in the presence of network f...

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13th ieee international conference on embedded and real-time computing systems and applications

作者： Gadgil, Shrirang Dasarathy, Balakrishnan Porter, Frederick Parmeswaran, Kirthika Vaidyanathan, Ravi Telcordia Technol Piscataway NJ USA

ISBN: (纸本)9780769529752

In a hostile military environment, systems must be able to detect and react to catastrophes in a timely manner in order to provide assurance that critical tasks will continue to meet their timeliness requirements. Our research focuses on achieving network quality of service (QoS) assurance using a Bandwidth Broker in the presence of network faults in layer-3 networks. Passive discovery techniques using the link-state information from routers provide for rapid path discovery which, in turn, leads to fast failure impact analysis and QoS restoration. In addition to network fault tolerance, the Bandwidth Broker must be fault tolerant and must be able to recover quickly. this is accomplished using a modified commercially available and open-source in-memory database cluster technology.

关键词： Quality of service

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An efficient page lock/release OS mechanism for out-of-core embedded applications

An efficient page lock/release OS mechanism for out-of-core ...

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13th ieee international conference on embedded and real-time computing systems and applications

作者： Patil, Ameet Audsley, Neil Univ York Dept Comp Sci Real Time Syst Grp York YO10 5DD North Yorkshire England

ISBN: (纸本)9780769529752

embedded system applications are becoming more complex, requiring increased memory. However additional physical memory increases system cost and power consumption. Virtual memory techniques such as paging, can make use of low-power auxiliary memory, allowing applications increased memory for execution. Currently paging yields poor performance due to page swapping overheads. this paper presents a combined approach of using application hints along with an efficient page lock/release mechanism in the OS to reduce paging overheads. this makes paging a viable solution to support out-of-core embedded real-time applications. the Co-operative Application Specific Paging (CASP) mechanism presented works in conjunction with most existing page replacement policies, providing explicit support for applications via insertion of paging hints in the application source code. Both automatic and manual methods of inserting hints are described and evaluated. the benchmark results of a CASP implementation in the Linux 2.6.16 kernel have shown significant reduction in the number of page faults (22.3%) and a considerable improvement in application execution times (12,5%).

关键词： Locks (fasteners)

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Critical-path based low-energy scheduling algorithms for body area network systems

Critical-path based low-energy scheduling algorithms for bod...

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13th ieee international conference on embedded and real-time computing systems and applications

作者： Liu, Yanhong Veeravalli, Bharadwaj Viswanathan, Sivakumar Natl Univ Singapore Dept Elect & Comp Engn Singapore 117548 Singapore Inst Infocomm Res Embedded Syst Dept Singapore Singapore

ISBN: (纸本)9780769529752

In this paper, we propose novel low-energy scheduling algorithms with low computational complexities for the heterogeneous Body A rea Network (BAN) systems, considering task graphs with deadlines (timing constraints) and precedence relationships to satisfy. Our proposed novel scheme, referred to as "critical-path information track-and-up-date ", analyses the critical-paths, identifies the slack and distributes it over tasks such that the overall energy consumption is minimised. Our dynamic scheduling algorithm utilises the results from the static scheduling algorithm and attempts to aggressively reduce the energy consumption. Simulations for the task graph for a typical BAN application show that our static and dynamic scheduling algorithms deliver 25% and 15% more energy savings respectively Compared to typical slack reclamation based scheduling algorithms.

关键词： Scheduling algorithms

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A deterministic implementation process for accurate and traceable system timing and space analysis

A deterministic implementation process for accurate and trac...

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13th ieee international conference on embedded and real-time computing systems and applications

作者： Ward, M. Audsley, N. C. Univ York Real Time Syst Grp York YO10 5DD N Yorkshire England

ISBN: (纸本)9780769529752

Traditionally, implementations of dependable real-time systems have targeted CPUs, with application level concurrency implemented as pseudo-concurrency on the CPU. For such systems, much research has addressed timing and resource analysis to enable offline guarantees regarding actual worst-case run-time performance. three major weaknesses exist with the traditional implementation method. Firstly, analysis is post-hoc, after application compilation and worst-case execution time analysis. Secondly, timing analysis is pessimistic and difficult, due to the unpredictable nature of complex CPUs. thirdly, the compilation process is largely non-traceable, in that it is difficult to relate object code back to source code (which introduces verification difficulties in safety-critical systems). this paper addresses these three problems with an implementation approach and analysis method that: enables timing and space properties to be established directly from source (not after compilation);provides a deterministic and traceable implementation to ease verification;and enables non-pessimistic timing analysis of the implementation as no CPU is utilised. As an exemplar of the approach, the compilation of a standard real-time safely-critical subset of Ada. to a circuit (implemented on Field Programmable Gate Array) is presented.

关键词： real time systems

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Preemption control for energy-efficient task scheduling in systems with a DVS processor and non-DVS devices

Preemption control for energy-efficient task scheduling in s...

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13th ieee international conference on embedded and real-time computing systems and applications

作者： Yang, Chuan-Yue Chen, Jian-Jia Kuo, Tei-Wei Natl Taiwan Univ Dept Comp Sci & Informat Engn Taipei 10764 Taiwan

ISBN: (纸本)9780769529752

In reality, peripheral devices often make a significant contribution to the power consumption of the entire system. An effective energy-efficient scheduling algorithm should consider not only the energy consumption of the processor but also the usages of devices. In. this paper we explore energy-efficient scheduling of periodic real-time tasks in a system with a dynamic-voltage-scaling (DVS) processor and multiple non-DVS system devices. We consider systems that any device used by a task remains operating while the task is active. We propose scheduling algorithms in the management of task preemption to reduce the energy consumption of devices. Simulation results show that our proposed algorithms could not only reduce the number of task preemption significantly but also minimize the energy consumption, compared to earliest-deadline-first scheduling.

关键词： energy-efficient scheduling preemption control real-time systems system-wide energy efficiency

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TERCOS: A novel technique for exploiting redundancies in fault-tolerant and real-time distributed systems

TERCOS: A novel technique for exploiting redundancies in fau...

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13th ieee international conference on embedded and real-time computing systems and applications

作者： Luo, Wei Yang, FuMin Tu, Gang Pang, LiPing Qin, Xiao Huazhong Univ Sci & Technol Sch Comp Sci & Technol Wuhan 430074 Peoples R China Auburn Univ Dept Comp Sci & Software Engn Auburn AL USA

ISBN: (纸本)9780769529752

In this paper, we propose a novel fault-tolerant technique, which is seamlessly integrated with fixed priority-based scheduling algorithm to explore redundancies to enhance schedulability in fault-tolerant and real-time distributed systems. Our fault-tolerant technique makes use of the primaiy-backup scheme to tolerate permanent hardware failures. Most importantly, the proposed technique (referred to as Tercos) terminates the execution of active backup copies when corresponding primary copies are successfully completed, therefore Tercos can reduce scheduling lengths in fault-free scenario to enhance schedulability by virtue of executing portions of active backup copies in passive forms. Experimental results show that compared with existing algorithm in literature, Tercos can significantly improve schedulability by up to 17.0% (with an average of 9.7 %).

关键词： Redundancy

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real-time loop scheduling with leakage energy minimization for embedded VLIW DSP processors

Real-time loop scheduling with leakage energy minimization f...

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13th ieee international conference on embedded and real-time computing systems and applications

作者： Wang, Meng Shao, Zili Xue, Chun Jason Sha, Edwin H. -M. Hong Kong Polytech Univ Dept Comp Kowloon Hong Kong Peoples R China City Univ Hong Kong Dept Comp Sci Hong Kong Kowloon Peoples R China Univ Texas Dallas Dept Comp Sci Richardson TX 75083 USA

ISBN: (纸本)9780769529752

In this paper we develop a novel real-time instruction-level loop scheduling technique to reduce leakage energy consumption for applications with loops on VLIW architecture. We first prove that the scheduling problem with the minimum leakage energy consumption within a timing constraint is NP-complete. then, LEMLS (Leakage Energy Minimization Loop Scheduling) algorithm is designed to repeatedly regroup a loop based on rotation scheduling [3], and decrease leakage energy integrating with leakage power reduction mechanism. We conduct experiments on a set of DSP benchmarks based on the power model of the VLIW processors in [12]. the results show that our algorithm achieves significant leakage energy saving compared with list scheduling and the algorithm in [19].

关键词： Energy utilization

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Modeling real-time garbage collection cost

Modeling real-time garbage collection cost

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13th ieee international conference on embedded and real-time computing systems and applications

作者： Fu, Wei Hauser, Carl Washington State Univ Sch Elect Engn & Comp Sci Pullman WA 99164 USA Washington State Univ Sch Elect Engn & Comp Sci Pullman WA USA

ISBN: (纸本)9780769529752

Given the major advantages of productivity and safety, the use of garbage collection (GC) in real-time systems has gained increasing attention. Guaranteeing garbage collection activities' worst-case execution time (WCET) is necessary for a real-time system to perform scheduling and schedulability analysis. this paper describes a detailed GC cost model for incremental mark-and-sweep GC exemplified by a modified Boehm-Demers-Weiser (BDW) collector the GC cost model computes the WCET for garbage collection in terms of (1) the performance of collector operations and (2) the garbage collection load offered by a real-time task. Separating these aspects is a step along the road to an engineering approach to garbage collection in real-time systems, allowing prediction of system, behavior from knowledge of component behavior and environmental specifications. the model incorporates the cost of write barriers that are needed to support incremental GC. To be useful for real-time systems, a model's predicted WCET must be no less than the actual WCET However unreasonably large overestimates are also problematic as they may lead to the incorrect conclusion that the application cannot be feasibly scheduled. A pessimism metric assesses the degree to which the model's predictions exceed the measured worst-case cost in particular instances.

关键词： real time systems

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