Many optimal uniprocessor schedulers, such as Earliest Deadline First (EDF) and Rate Monotonic (RM), do not have a good schedulability bound on multiprocessor systems. In this paper we study an on-line algorithm Earli...
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ISBN:
(纸本)9780769529752
Many optimal uniprocessor schedulers, such as Earliest Deadline First (EDF) and Rate Monotonic (RM), do not have a good schedulability bound on multiprocessor systems. In this paper we study an on-line algorithm Earliest Deadline First until Zero laxity (EDZL) for multiprocessor systems. A set of tasks scheduled by EDZL is scheduled using EDF until a job experiences a zero laxity. To avoid the job from missing its deadline, the priority of the job is immediately promoted to the highest priority. We derive the schedulability bound of 3/2+vertical bar u(max)-1/2 vertical bar for two-processor systems, where u(max) is the maximum utilization of an individual task in the given task set. We also discuss the best known upper bound and lower bound on EDZL schedulability conditions.
Data being used in real-timesystems must be up-to-date to produce correct results. the use of outdated data can have catastrophic consequences since calculated control signals are based on stale data. Two distinct me...
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ISBN:
(纸本)9780769529752
Data being used in real-timesystems must be up-to-date to produce correct results. the use of outdated data can have catastrophic consequences since calculated control signals are based on stale data. Two distinct methods to update data exist: (i) dedicated tasks (DT) update data items, and (ii) on-demand (OD) updating being a conditioned part of the execution flow of tasks. On-demand updating has not been studied in terms of CPU utilization analysis for real-timesystems. this paper studies on-demand updating in terms of (i) imposed workload and compares the workload to Deferrable Scheduling (DS), and (ii) analytical formula for estimating workload to be used in CPU utilization based schedulability tests. It is found that on-demand updating uses less workload for updates compared to DS, which suggests on-demand updating should be used for resource constrained systems. However, using on-demand updating makes the execution times of updates unpredictable, which currently gives two possibilities (i) be pessimistic and assume all updates always execute or (ii) be less pessimistic but estimate the times between executions of updates. this paper devises a formula for such estimates and compares their result to approach (i). Evaluations show the formula can be useful for soft real-timesystems.
Doubling the number of processing cores on a single processor chip with each technology generation has become conventional wisdom. While future manycore processors promise to offer much increased computational through...
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ISBN:
(纸本)9780769529752
Doubling the number of processing cores on a single processor chip with each technology generation has become conventional wisdom. While future manycore processors promise to offer much increased computational throughput under a given power envelope, sharing critical on-chip resources, such as caches and coreto-core interconnects, poses challenges to guaranteeing predictable performance to an application program. this paper focuses on the problem of sharing on-chip caching capacity among multiple programs scheduled together, especially at the L2 cache level. Specifically, two design aspects of a large shared L2 cache are considered: (1) non-uniform cache access latency and (2) cache contention. We observe that boththe aspects have to do with where, among many cache slices, a cache block is mapped to, and present an OS-based approach to managing the on-chip L2 cache memory by carefully mapping data to a cache at the page granularity. We show that a reasonable extension to the OS memory management subsystem and simple architectural support enable enforcing high-level policies to achieve application performance isolation and improve program performance predictability thereof.
Model-based development is state of the art in software engineering, due to its potential regarding automatic code synthesis. Nevertheless for embeddedsystems, where there exists a huge heterogeneity of used platform...
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ISBN:
(纸本)9780769530543
Model-based development is state of the art in software engineering, due to its potential regarding automatic code synthesis. Nevertheless for embeddedsystems, where there exists a huge heterogeneity of used platforms, it is obvious that it is impossible to design a code generator that supports a priori all required platforms. Instead a code generator architecture is needed that is suited for an easy extensibility of the code generation ability. One possible solution is the use of template-based approaches. In this paper, we describe an approach(1) to develop safety-critical real-timesystems by using openArchitecture Ware, a modular MDA/MDD generator framework. We will present the tool-chain and discuss two lab applications.
this paper examines the structures that are used by traditional real-time and networked operating systems in order to show that they are poorly suited to providing efficient access to remote devices. It also argues th...
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this paper examines the structures that are used by traditional real-time and networked operating systems in order to show that they are poorly suited to providing efficient access to remote devices. It also argues that efficiency can be improved by being more specific and by making better use of the network mediums characteristics.
In this paper, we introduce an extension of Duration Calculus called Simple Probabilistic Duration Calculus (SPDC) to express dependability requirements for real-timesystems, and address the problem to decide if a pr...
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In this paper, we introduce an extension of Duration Calculus called Simple Probabilistic Duration Calculus (SPDC) to express dependability requirements for real-timesystems, and address the problem to decide if a probabilistic timed automaton satisfies a SPDC formula. We prove that the problem is decidable for a class of SPDC called probabilistic linear duration invariants, and provide a model checking algorithm for solving this problem.
In this paper we propose an integrated approach for control design and real-time scheduling, suitable for both discrete-time and continuous-time controllers. It guarantees system performance by accepting a certain min...
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In this paper we propose an integrated approach for control design and real-time scheduling, suitable for both discrete-time and continuous-time controllers. It guarantees system performance by accepting a certain minimum value of jitter for control tasks and feasibly schedules them together with other tasks in the system. Results from comparison with other approaches from real-time and control theory domains underline the effectiveness of our method.
Each domain has its own interpretation of time. We propose to extend UML, which is more and more used in the domain of real-timeembeddedapplications, with a concept of time inherited from reactive system modeling : ...
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Each domain has its own interpretation of time. We propose to extend UML, which is more and more used in the domain of real-timeembeddedapplications, with a concept of time inherited from reactive system modeling : multiform time. After a brief review of some UML profiles, we present our extensions and we illustrate - on an example from the automotive industry - how to represent and to constraint behaviors depending on multiform time. We advocate that this model of time offers wider possibilities than restricting models only to the physical time.
In this paper we introduce deterministic bridge connectors, a type of construct that ensures deterministic data-flow communication in asynchronous real-timesystems. We also present a methodology for generating these ...
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In this paper we introduce deterministic bridge connectors, a type of construct that ensures deterministic data-flow communication in asynchronous real-timesystems. We also present a methodology for generating these connectors automatically from the application's architecture description in order to reduce programmer effort and the chance of error. We provide a process algebraic verification of the determinism property of these connectors. We conclude by presenting arguments in favor of using this verification in lieu of expensive certification to qualify these constructs for onboard deployment.
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