Hardware/software codesign involves various design problems including system specification, design space exploration, hardware/software co-verification, and system synthesis. A codesign environment is a software tool ...
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ISBN:
(纸本)0769526764
Hardware/software codesign involves various design problems including system specification, design space exploration, hardware/software co-verification, and system synthesis. A codesign environment is a software tool that facilitates capabilities to solve these design problems. this paper presents the PeaCE codesign environment mainly targeting for multimedia applications withreal-time constraints. PeaCE specifies the system behavior with a heterogeneous composition of three models of computation. the PeaCE environment provides seamless co-design flow from functional simulation to system synthesis, utilizing the features of the formal models maximally during the whole design process. Preliminary experiments withreal examples prove the viability of the proposed technique.
In this paper we analyze the traditional model of interrupt management and its inability to incorporate the reliability and temporal predictability demanded by real-timesystems. As a result of this analysis, we propo...
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ISBN:
(纸本)0769526764
In this paper we analyze the traditional model of interrupt management and its inability to incorporate the reliability and temporal predictability demanded by real-timesystems. As a result of this analysis, we propose a model that and task integrates interrupts tasks handling. We introduce a novel implementation of this model that uses an adaptation of the optimistic interrupt protection technique [12] for achieving predictability and low overhead. the detailed design of a flexible and portable kernel interrupt subsystem for this integrated optimistic model is presented. We make a schedulability analysis to evaluate the optimistic integrated model and perform experiments to verify its deterministic behavior and its overhead.
Consider the problem of scheduling a set of periodically arriving tasks on a multiprocessor withthe goal of meeting deadlines. Processors are identical and have the same speed. Tasks can be preempted and they can mig...
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ISBN:
(纸本)0769526764
Consider the problem of scheduling a set of periodically arriving tasks on a multiprocessor withthe goal of meeting deadlines. Processors are identical and have the same speed. Tasks can be preempted and they can migrate between processors. We propose an algorithm with a utilization bound of 66% and with few preemptions. It can trade a higher utilization bound for more preemptions and in doing so it has a utilization bound of 100%.
Component middleware is popular for enterprise distributed systems because it provides effective reuse of the-core intellectual property (i.e., the "business logic'). Component-based enterprise distributed re...
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ISBN:
(纸本)0769526764
Component middleware is popular for enterprise distributed systems because it provides effective reuse of the-core intellectual property (i.e., the "business logic'). Component-based enterprise distributed real-time and embedded (DRE) systems, however, incur new integration problems associated with component configuration and deployment. New research is therefore needed to minimize the gap between the development and deployment/configuration of components, so that deployment and configuration strategies can be evaluated well before system integration. this paper uses an industrial case study from the domain of shipboard computing to show how system execution modeling tools can provide software and system engineers with quantitative estimates of system bottlenecks and performance characteristics to help evaluate the performance of component-based enterprise DRE systems and reduce time/effort in the integration phase. the results from our case study show the benefits of system execution modeling tools and pinpoint where more work is needed.
the number of computer-controlled functions in an automobile is increasing at a rapid rate and so is the number of microprocessors implementing and controlling these functionalities. therefore, there is a need. to min...
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ISBN:
(纸本)0769526764
the number of computer-controlled functions in an automobile is increasing at a rapid rate and so is the number of microprocessors implementing and controlling these functionalities. therefore, there is a need. to minimize the computing power provided without affecting the performance and safety of the applications. the latter is especially important since intelligent automotive applications deal with critical data and involve deadline bound computations on data gathered from the automobiles' environment. these applications have stringent requirements on the freshness of data items and completion time of the tasks. Our work studies one such safety-critical application, namely Adaptive Cruise Control (ACC). We take a task+data centric approach for designing and implementing this application. As our contributions we have (i) identified the data and task characteristics of ACC and shown how to map them on a real-world (robotic) platform, (ii) facilitated a real-time approach towards designing ACC by the application of mode-change and real-time data repository concepts for reducing CPU capacity requirements and (iii) provided the scheduling strategies to meet the timing requirements of the tasks. Experiments demonstrate that the CPU capacity requirement can be reduced without compromising the real-time guarantees for safety-critical applications.
In this paper, we aim at capturing the industrial viewpoint of todays and future requirements in development of embeddedreal-timesystems. We do this by interviewing ten senior designers at four Swedish companies, de...
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ISBN:
(纸本)0769525466
In this paper, we aim at capturing the industrial viewpoint of todays and future requirements in development of embeddedreal-timesystems. We do this by interviewing ten senior designers at four Swedish companies, developing embeddedapplications in the vehicle domain. this study shows that reliability and safety are the main properties in focus during development. It also shows that the amount of functionality has been increasing in the examined systems. Still the present requirements are fulfilled using considerably homogenous development methods. the study also shows that, in the future, there will be even stronger requirements on dependability and control performance at the same time as requirements on more softer and resource demanding functionality will continue to increase. Consequently, the complexity will increase, and with diverging requirements, more heterogeneous development methods are called for to fulfill all application specific requirements.
the deferrable scheduling algorithm for fixed priority transactions (DS-FP) [23] is demonstrated to be a very effective approach for minimizing real-time update transaction workload while maintaining temporal validity...
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ISBN:
(纸本)0769526764
the deferrable scheduling algorithm for fixed priority transactions (DS-FP) [23] is demonstrated to be a very effective approach for minimizing real-time update transaction workload while maintaining temporal validity of real-time data. this paper examines the schedulability of deferrable scheduling and presents a sufficient condition. While its on-line scheduling overhead is a concern, we propose a hyperperiod based DS-FP approach satisfying the temporal validity constraint with low overhead. the algorithm, namely DEferrable Scheduling with Hyperperiod by Schedule Adjustment (DESH-SA), adjusts the DS-FP schedule in an interval so that the adjusted schedule in the interval can be repeated infinitely. Our experiments demonstrate that DESH-SA can reduce scheduling overhead of DS-FP and also achieve update workload near optimal.
Generating multi-threading implementation of embedded software from design models, i.e. implementation synthesis, is a critical stage during embedded software development, where many nonfunctional requirements are imp...
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ISBN:
(纸本)0769526764
Generating multi-threading implementation of embedded software from design models, i.e. implementation synthesis, is a critical stage during embedded software development, where many nonfunctional requirements are implemented and optimized. Currently, almost all research work on implementation synthesis of embedded software assumes that the underlying operating systems use the priority-based fully preemptive scheduling strategy. However, real-world embedded operating systems may support many kinds of scheduling strategies for different requirements. this paper presents an implementation synthesis method under operating systemsthat support the group-based scheduling model, which extends the application scope of implementation synthesis. the implementation synthesis method involves task grouping, priority assignment for task groups, task generation and priority assignment. Experimental evaluation shows our method can yield multi-threading embedded software effectively while satisfying real-time requirements.
this research is motivated by the needs of dwell scheduling over multiple transmitters/receivers in many real radar systems. We propose a linear-programming-based approach with efficient implementations to minimize th...
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ISBN:
(纸本)0769526764
this research is motivated by the needs of dwell scheduling over multiple transmitters/receivers in many real radar systems. We propose a linear-programming-based approach with efficient implementations to minimize the number of radar tasks being dropped from the system and to balance workloads over multiple transmitters/receivers. A priority-based task dropping policy and an incremental version of the task assignment algorithm are proposed for task dropping and on-line implementations. the capability of the proposed algorithm is evaluated by a series of experiments, for which we have encouraging results.
A Key issue in wireless real-time communications is to meet the real-time constraint with low energy consumption. In this paper, we propose an energy-efficient error correcting scheme for weakly hard real-time communi...
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ISBN:
(纸本)0769526764
A Key issue in wireless real-time communications is to meet the real-time constraint with low energy consumption. In this paper, we propose an energy-efficient error correcting scheme for weakly hard real-time communications in wireless networks. A weakly hard read-time communication should send at least m messages during any window of k periods. the proposed scheme adaptively selects an error correcting code under the current communication status in order to meet the (m, k)-constraint and minimize the energy consumption. Simulation results show that the suggested scheme provides better performance in terms of the (m, k)constraint meeting rate per unit energy consumption.
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