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检索条件"任意字段=13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications"

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A parametrizable hybrid stack-register processor as soft intellectual property module

A parametrizable hybrid stack-register processor as soft int...

引用

Annual ieee international ASIC/SOC conference

作者： P. Luthi T. Rower M. Stadler D. Forrer S. Moscibroda N. Felber H. Kaeslin W. Fichtner Integrated Systems Laboratory Swiss Federal Institute of Technology Zurich Switzerland

Hardware/software co-design usually encounters serious problems to guarantee strong real-time constraints while serving many interrupt routines. We present an enhanced register-based RISC processor, which is capable of launching every interrupt routine within two clock cycles. this processor is implemented as soft IP-Module and features a customizable instruction set, extensive parameterization, and a synthesis model with separate core and interfaces. An automatic derivation of adequate test vectors from the current parameter setting verifies the correct functionality.

关键词： Intellectual property Hardware Application specific integrated circuits embedded software Process design real time systems Circuit testing Microprocessors Laboratories Reduced instruction set computing

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Concurrent embedded real-time software verification

Concurrent embedded real-time software verification

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ieee Annual international Computer Software and applications conference (COMPSAC)

作者： Pao-Ann Hsiung Institute of Information Science Academia Sinica Taiwan

the verification of software is more complex than hardware due to inherent flexibilities (dynamic behavior) that incur a multitude of possible system states. the verification of Concurrent embedded real-time Software (CERTS) is all the more difficult due to its concurrency and embeddedness. the work presented shows how the complexity of CERTS verification can be reduced significantly through answering common engineering questions such as when, where, and how one must verify embedded software. Application examples illustrate the usefulness of our technique in increasing verification scalability.

关键词： embedded software Concurrent computing Processor scheduling Control system synthesis Scalability Software systems embedded computing Information science Formal verification real time systems

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A program compression technique supporting IP-centric SOC design

A program compression technique supporting IP-centric SOC de...

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Annual ieee international ASIC/SOC conference

作者： Chingwei Yeh Chi-Shong Wang Department of Electrical Engineering National Chung Cheng University Chiayi Taiwan

ISBN: (纸本)0780365984

RISC architecture plays a major role in recent embedded systems design. the notorious drawback of a RISC machine is its poor code density. Many research works have been proposed to reduce the code density. However, they either need a sophisticated compression-decompression mechanism, or are suitable for specific applications. In this paper, a method to compress a post-compilation program is proposed to improve code density while introducing minimal hardware overhead. the salient features of our technique are: (1) the decompression circuitry depends only on the instruction set of a processor and so is reusable for any application running on the same processor; and (2) there is no limitation on the size of the program to be compressed. We demonstrate our technique on SPEC CINT95 benchmark programs using the ARM7TDMI instruction set and achieve an average code size reduction of 19.8%.

关键词： Reduced instruction set computing embedded system Hardware Energy consumption Costs System-on-a-chip Circuits Modems TV Control systems

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international Research Centre for Telecommunications-transmission and Radar (IRCTR)

International Research Centre for Telecommunications-transmi...

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international conference on Microwaves, Radar and Wireless Communications

作者： L.P. Ligthart Delft University of Technology Delft Netherlands

ISBN: (纸本)8390666235

the Faculty of Information Technology and systems (ITS) of Delft University of Technology (DUT) has developed an efficient and effective strategy for the implementation of research programs in the fields of telecommunications transmission and radar, the international Research Centre for Telecommunications transmission and Radar (IRCTR). Under the auspices of the IRCTR, cooperation with a large number of national and internally scientific institutes and companies has been established. For the last decade many companies, institutions and universities have participated in the radar and remote sensing research activities of DUT. As a result of that, the radar technology and systems, antennas and propagation and remote sensing research carried out at the Delft University of Technology has gained national and international recognition. In addition to radar there are the immense developments taking place in wireless communications which need to be addressed. Broadband communications are growing sectors with important applications in office automation, logistics services, personal communications and satellite communications. Unique research facilities for radars and communications have been built. these include DARR (Delft Atmospheric Research Radar), SOLIDAR (solid state radar), TARA (transportable atmospheric radar), DUCAT (Delft University Chamber for Antenna Tests) and CM-MM wave test and measurement equipment, as well as unique real-time computer and signal processing systems.

关键词： Spaceborne radar Radar antennas Radar remote sensing Radar signal processing Radar equipment Radar measurements Remote sensing Atmospheric waves System testing Information technology

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On-chip multimedia real-time OS and its MPEG-2 applications 6

On-chip multimedia real-Time OS and its MPEG-2 applications

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6th international conference on real-time computing systems and applications, RTCSA 1999

作者： Iwasaki, H. Naganuma, J. Endo, M. Ogura, T. NTT Cyber Space Laboratories 1-1 Hikarinooka Yokosuka-Shi Kanagawa Pref239-0847 Japan

ISBN: (纸本)0769503063

Proposes a very small on-chip multimedia real-time operating system (OS) for embedded system LSIs and demonstrates its usefulness on MPEG-2 multimedia applications. the real-time OS, which has a new cyclic task with 'suspend' and 'resume' for the interacting hardware/software of embedded system LSIs, implements the minimum set of task, interrupt and semaphore management on the basis of an analysis of embedded software requirements. It requires only about 2.5 KBytes memory at run-time, reduces redundant conventional cyclic task execution steps to about 1/2 for hardware/software interactions and provides sufficient performance in real time by implementing two typical embedded software packages for practical multimedia system LSIs. this on-chip multimedia real-time OS can be easily integrated on many embedded-system LSIs and provides an efficient embedded software design environment. © 1999 ieee.

关键词： embedded systems

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Schedulability-driven communication synthesis for time triggered embedded systems 6

Schedulability-driven communication synthesis for time trigg...

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6th international conference on real-time computing systems and applications, RTCSA 1999

作者： Pop, P. Eles, P. Peng, Zebo Dept. of Comput. and Inf. Sci. Linkoping Univ Sweden

ISBN: (纸本)0769503063

We present an approach to static priority preemptive process scheduling for the synthesis of hard real-time distributed embedded systems where communication plays an important role. the communication model is based on a time-Triggered protocol. We have developed an analysis for the communication delays proposing four different message scheduling policies over a time-Triggered communication channel. Optimization strategies for the synthesis of communication are developed, and the four approaches to message scheduling are compared using extensive experiments. © 1999 ieee.

关键词： embedded systems

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Software dependability considered as the main problem of contemporary real time computing 6

Software dependability considered as the main problem of con...

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6th international conference on real-time computing systems and applications, RTCSA 1999

作者： Halang, W.A. Computer Engineering and Real Time Systems Faculty of Electrical Engineering Fern Universitat Hagen58084 Germany

ISBN: (纸本)0769503063

More and more, society depends on computer based technical systems, which are being applied for both control and automation functions under real time constraints. these so-called "embedded computer systemsii"' pervade all areas of our lives, and can be found in household appliances like microwave ovens and washing machines, in automatic teller machines, in electronic commerce and banking, in aircraft and trains, in air-Traffic and railway control systems, and in medical systems, allowing for higher productivity and flexible adaptation. this by no means exhaustive list shows that a large number of embedded computer systems performs critical functions, both with respect to human safety and security of data. they can be categorized as. © 1999 ieee.

关键词： Domestic appliances

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A time synchronization method for NTP 6

A time synchronization method for NTP

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6th international conference on real-time computing systems and applications, RTCSA 1999

作者： Jun, Sun-Mi Yu, Dong-Hui Kim, Young-Ho Seong, Soon-Yong Dept. of Computer Engineering Pusan Univ. of Foreign Studies Korea Republic of

ISBN: (纸本)0769503063

this paper introduces an implementation of a clock synchronization method for NTP (Network time Protocol). NTP is widely used and an effective application protocol in maintaining time synchronization over the network. But the performance of NTP depends on Operating System (OS) and on the real time property of OS because of working on the time management functions provided by the general-purpose OS. But, currently available Oses' real time properties are restricted. So the needs of the embedded time synchronization systems are increasing. this paper analyzes the OS dependencies of NTP and shows the OS requirements for the time synchronization. Also the implementing features of the prototype are described and the system configuration components are shown. In the outcome of the analysis, this paper shows a clock model for embedded systems. © 1999 ieee.

关键词： embedded systems

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Voltage-clock scaling for low energy consumption in real-time embedded systems 6

Voltage-clock scaling for low energy consumption in real-Tim...

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6th international conference on real-time computing systems and applications, RTCSA 1999

作者： Lee, Yann-Hang Krishna, C.M. Computer and Information Science and Eng. Dept. University of Florida GainesvilleFL32608 United States Electrical and Computer Engineering Dept. University of Massachusetts AmherstMA01003 United States

ISBN: (纸本)0769503063

Low power and energy consumption will always be an essential requirement in many real-time embedded applications. Voltage scaling is a relatively novel approach to reducing energy consumption. the idea is that a processor can be run either at high or at low voltage: At high voltage, the clock rate is high but so is the power consumption;at low voltage the clock rate is lower, but the power consumption drops by a greater factor. this immediately suggests a powerful approach to lowering energy consumption in real-time systems. In this paper we introduce static and dynamic algorithms to control processor voltage to reduce energy consumption. We demonstrate by simulation that our algorithms can significantly reduce total energy consumption. © 1999 ieee.

关键词： Electric power utilization

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Proceedings - 6th international conference on real-time computing systems and applications, RTCSA 1999

Proceedings - 6th International Conference on Real-Time Comp...

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6th international conference on real-time computing systems and applications, RTCSA 1999

ISBN: (纸本)0769503063

the proceedings contain 74 papers. the topics discussed include: software dependability considered as the main problem of contemporary real time computing;state restoration in real-time systems;dynamic adjustment of serialization order using timestamp intervals in real-time databases;value-driven multi-class overload management;adaptive data broadcast strategy for transactions with multiple data requests in mobile computing environments;a framework for scheduling in safety-critical embedded control systems;feasibility intervals for the deadline driven scheduler with arbitrary deadlines;scheduling periodic task systems to minimize output jitter;adaptive bandwidth reservation for multimedia computing;and pipeline timing analysis using a trace-driven simulator.

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