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检索条件"任意字段=13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications"

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Evaluation of Memory Access Arbitration Algorithm on Tilera's TILEPro64 platform 17

Evaluation of Memory Access Arbitration Algorithm on Tilera'...

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2015 ieee 17th international conference on High Performance computing and Communications (HPCC)

作者： Shekhar, Mayank Ramaprasad, Harini Mueller, Frank Southern Illinois Univ Carbondale Carbondale IL 62901 USA Univ North Carolina Charlotte Charlotte NC USA North Carolina State Univ Raleigh NC USA

ISBN: (纸本)9781479989379

As real-time embedded systems demand more and more computing power under reasonable energy budgets, multi-core platforms are a viable option. However, deploying real-time applications on multi-core platforms introduce several predictability challenges. One of these challenges is bounding the latency of memory accesses issued by real-time tasks. this challenge is exacerbated as the number of cores and, hence, the degree of resource sharing increases. Over the last several years, researchers have proposed techniques to overcome this challenge. In prior work, we proposed an arbitration policy for memory access requests over a Network-on-Chip. In this paper, we implement and evaluate variants of our arbitration policy on a real hardware platform, namely Tilera's TilePro64 platform.

关键词： embedded systems multiprocessing systems network-on-chip storage management TILEPro64 platform memory access arbitration algorithm multicore platforms real-time embedded systems Dynamic scheduling Engines Hardware Instruction sets Memory management real-time systems System-on-chip

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Design and Performance Analysis of Secure and Dependable Cybercars: A Steer-by-Wire Case Study

Design and Performance Analysis of Secure and Dependable Cyb...

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Annual ieee Consumer Communications and Networking conference

作者： Arslan Munir Farinaz Koushanfar Computer Science & Engineering Department University of Nevada Reno NV USA Electrical & Computer Engineering Department Rice University Houston TX USA

ISBN: (纸本)9781467392938

the next generation of automobiles (also known as cybercars) will increasingly incorporate electronic control units (ECUs) in novel automotive control applications. Recent work has demonstrated vulnerability of modern car control systems to security attacks that directly impact the cybercar's physical safety and dependability. In this paper, we provide an integrated approach for the design of secure and dependable cybercars using a case study: a steer-by-wire (SBW) application over controller area network (CAN). the challenge is to embed both security and dependability over CAN while ensuring that the real-time constraints of the cybercar applications are not violated. Our approach enables early design feasibility analysis by embedding essential security primitives (i.e., confidentiality, integrity, and authentication) over CAN subject to the realtime constraints imposed by the desired quality of service and behavioral reliability. Our method leverages multi-core ECUs for providing fault-tolerance by redundant multi-threading (RMT) and also further enhances RMT for quick error detection. We quantify the error resilience of our approach and evaluate the interplay of performance, fault-tolerance, security, and scalability for our SBW case study.

关键词： Automotive embedded systems multi-core security dependability fault-tolerance x-by-wire steer-by-wire

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Singular Value Decomposition FPGA Implementation for Tactile Data Processing 13

Singular Value Decomposition FPGA Implementation for Tactile...

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13th ieee international NEW Circuits and systems conference

作者： Ibrahim, Ali Valle, Maurizio Noli, Luca Chible, Hussein Univ Genoa DITEN COSMIC Lab Genoa Italy Lebanese Univ Microelect Res Lab Beirut Lebanon

ISBN: (纸本)9781479988938

embedded electronic systems for tactile data processing capture the attention of recent researchers because of its importance in many domains. Machine learning based on tensorial kernel approach has proven its effectiveness in processing tactile information. computing tensorial kernel corresponds to computing the singular value decomposition. this paper presents an FPGA implementation of singular value decomposition for tensorial kernel computation. the design is implemented for an arbitrary mxn matrix with fixed point arithmetic. the results figure out a tradeoff between the accuracy of computation and the input data resolution. the experimental results demonstrate the efficiency of our design by increasing the accuracy of computation and by providing comparable results in terms of time latency.

关键词： SVD FPGA implementation One sided Jacobi algorithm Tensorial kernel embedded electronic systems

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real-time Memory Controller for embedded Multi-core System 17

Real-Time Memory Controller for Embedded Multi-core System

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2015 ieee 17th international conference on High Performance computing and Communications (HPCC)

作者： Mohamed, Ahmed S. S. El-Moursy, Ali A. Fahmy, Hossam A. H. Cairo Univ Elect & Commun Engn Dept Cairo Egypt Univ Sharjah Elect & Comp Engn Dept Sharjah U Arab Emirates

ISBN: (纸本)9781479989379

Nowadays modern chip multi-cores (CMPs) become more demanding because of their high performance especially in real-time embedded systems. On the other side, bounded latencies has become vital to guarantee high performance and fairness for applications running on CMPs cores. We propose a new memory controller that prioritizes and assigns defined quotas for cores within unified epoch (MCES). Our approach works on variety of generations of double data rate DRAM (DDR DRAM). MCES is able to achieve an overall performance reached 35% for 4 cores system.

关键词： real-time Memory Controller CMPs

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A Framework for Implementing the Concept of Citizen as a Sensor

A Framework for Implementing the Concept of Citizen as a Sen...

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ieee Internatonal conference on Mobile Adhoc and Sensor systems (MASS)

作者： Maria Luísa L. de Faria Roberto Fray Da Silva Carlos Eduardo Cugnasca Sch. of Eng. Comput. & Digital Syst. Universidade de Sao Paulo Sao Paulo SÃ£o Paulo BR School of Engineering Electronic Systems Universidade de Sao Paulo Sao Paulo SÃ£o Paulo BR Sch. of Eng. Comput. & Digital Syst. University of São Paulo Sao Paulo Brazil

ISBN: (纸本)9781509028344

Smart devices are collecting and sending information from all over the world in near real-time, influencing the decisions of the citizens on various levels and subjects. Under these circumstances, people are now known as smart citizens and a new paradigm is evolving: citizen as sensor. Although many studies have been exploring Big Data, very little research has been done on the aggregation of heterogeneous data sources that consider, not only the environment, but also the citizen as the most important parameter in the system. the purpose of this paper is to describe the main components required to implement the concept of the citizen as a sensor and to develop a framework that aggregates different data sources. the framework proposed highlights the importance of data and investigates several techniques to extract intelligible information from fused data in order to provide useful information and customized applications and services.

关键词： Smart cities Data mining Internet of things Wireless sensor networks Social networking (online) Data integration

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Detecting Fault Injection Attacks on embedded real-time applications: A System-Level Perspective 17

Detecting Fault Injection Attacks on Embedded Real-Time Appl...

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2015 ieee 17th international conference on High Performance computing and Communications (HPCC)

作者： Wen, Liang Jiang, Wei Jiang, Ke Zhang, Xia Pan, Xiong Zhou, Keran Univ Elect Sci & Technol China Sch Informat & Software Engn Chengdu Sichuan Peoples R China Linkoping Univ Dept Comp & Informat Sci Linkoping Sweden Univ Texas Dallas Dept Comp Sci Richardson TX USA

ISBN: (纸本)9781479989379

this paper presents an approach to the synthesis of secure real-time applications mapped on distributed embedded systems, which focuses on preventing fault injection attacks. We utilize symmetric cryptographic service to protect confidentiality, and deploy fault detection within confidential algorithm to resist fault injection attacks. Several fault detection schemes are identified, and their fault coverage rates and time overheads are derived and measured, respectively. Our synthesis approach makes efforts to determine the best fault detection schemes for the encryption/decryption of messages, such that the overall security strength of resisting fault injection attack is minimized, and the deadline constraint of the real-time applications is guaranteed. Since addressing the problem is still a NP-hard problem, we propose an efficient algorithm based on Fruit fly Optimization Algorithm (FOA), which can achieve better results by lower time overheads, compared with simulated annealing algorithm. Extensive experiments demonstrate the superiority of our approach.

关键词： Fault coverage Fault detection Fault injection attack System-level design

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TrafficVision: A Case for Pushing Software Defined Networks to Wireless Edges

TrafficVision: A Case for Pushing Software Defined Networks ...

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ieee Internatonal conference on Mobile Adhoc and Sensor systems (MASS)

作者： Mostafa Uddin Tamer Nadeem Bell Labs (Nokia) Department Of Computer Science Old Dominion University Norfolk USA

ISBN: (纸本)9781509028344

In wireless network edges, knowing the network flow types and applications can enable various policy-driven network managements (i.e. traffic offloading, BYOD, E2E QoS etc.). However, applying network policies at wireless links between the mobile devices and access points (APs) requires greater visibility and control on generated traffic generated from mobile devices. the recent advent of Software-Defined Networking (SDN) could enable fine-grained network management at the edge. However, in existing solutions, SDN uses external Deep-Packet Inspection (DPI) engine that requires additional and potentially heavy loaded computational resources to perform the packet analysis. Moreover, mobile applications become more dynamic (rapid install/update), diverse and complex (individual applications generate multiple traffic types) in which scalability and granularity requirements challenging current DPI solutions. In addition, DPI is unreliable in classifying application's encrypted packets. therefore, in this paper we present the design and the development of TrafficVision that extends the SDN's layer architecture to have fine-grained and real-time policy making at wireless network edges. More specifically, we carefully extends the SDN framework to develop tools that allow to have scalable, efficient and flexible way to classify the network traffic flows at fine-grained fashion using Machine-Learning (ML) based technique. We evaluate our system using the performance of CPU utilization, network overhead and network throughput metrics. Finally, as a proof of concept, we develop a simple case study of traffic management application that exploits TrafficVision.

关键词： Engines Streaming media Wireless networks Feature extraction TV Mobile applications Protocols

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Bayesian Predictive Assistance System: An embedded Application for Resource Optimization in Industrial Cleaning Processes 13

Bayesian Predictive Assistance System: An Embedded Applicati...

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13th ieee international conference on Industrial Informatics (INDIN)

作者： Shrestha, Ganesh Man Li, Peng Niggemann, Oliver Univ Appl Sci InIT Inst Ind IT D-32657 Lemgo Germany Fraunhofer IOSB INA D-32657 Lemgo Germany

ISBN: (纸本)9781479966493

Bayesian networks (BNs) have been used in different contexts of decision support solutions such as directive, strategic, tactical and operational. these contexts differ from each other only in the realization of the decision support in terms of time. the real-time implementation of BN in an embedded system for resource optimization is very challenging because of the low computation capacity in embedded systems and, to the best of our knowledge, has not been reported yet. In this paper, we present a BN based predictive assistance system that uses real-life data to perform the real-time decision support in industrial cleaning processes.

关键词： decision making support embedded systems cleaning treatment embedded application Industrial Predictive Bayesian inference

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IOMPU: Spatial Separation for Hardware-Based I/O Virtualization for Mixed-Criticality embedded real-time systems Using Non-Transparent Bridges 17

IOMPU: Spatial Separation for Hardware-Based I/O Virtualizat...

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2015 ieee 17th international conference on High Performance computing and Communications (HPCC)

作者： Muench, Daniel Paulitsch, Michael Herkersdorf, Andreas Airbus Grp Innovat Munich Germany Thales Austria GmbH Thales Grp Vienna Austria Tech Univ Munich Munich Germany

ISBN: (纸本)9781479989379

Safety-critical systems and in particular mixed-criticality systems require spatial and temporal separation for their hosted applications and functionalities. Additional constraints are using Commercial Off-the-Shelf (COTS) components, portability and determinism. these items are required for economic success for products with low piece numbers and long life-cycles like aircraft. Available embedded processors lack means for spatial separation of Input/Output (I/O) components like an Input/Output Memory Management Unit (IOMMU). the objective of this paper is to provide spatial separation for I/O in COTS mixed-criticality embedded real-time systems like avionics with minimum possible impact on performance (transfer time, transfer rate, Central Processing Unit (CPU) usage). the three main contributions of this paper are: (1) the presented Input/Output Memory Protection Unit (IOMPU) enables to upgrade spatial separation for I/O to a system by using COTS components and Non-Transparent Bridge (NTB) technology. In addition, the IOMPU concept is compatible with existing temporal separation solutions. (2) the paper shows a prototype implementation and a potential use case in context of hardware-based I/O virtualization. (3) the evaluation in this paper demonstrates that the IOMPU concept is practically applicable. the performance overhead (transfer time, transfer rate) is below 0.88%, which is almost negligible, particularly compared to state-of-the-art software-based solutions.

关键词： embedded systems storage management COTS component COTS mixed-criticality embedded real-time system CPU I/O component IOMPU NTB technology central processing unit commercial off-the-shelf component embedded processor hardware-based I/O virtualization input/output component input/output memory management unit mixed-criticality embedded real-time system nontransparent bridge safety-critical system Bridges Memory management Program processors real-time systems System-on-chip Virtualization IOMMU mixed-criticality systems non-transparent bridge (NTB) real-time embedded systems spatial separation

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embedded Instruments for Enhancing Dependability of Analogue and Mixed-Signal IPs 13

Embedded Instruments for Enhancing Dependability of Analogue...

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13th ieee international NEW Circuits and systems conference

作者： Wan, Jinbo Kerkhoff, Hans G. Univ Twente CTIT Testable Design & Test Integrated Syst Grp TDT POB 217 NL-7500 AE Enschede Netherlands

ISBN: (纸本)9781479988938

the idea of an embedded instrument (EI) is to embed some form of test and measurement into silicon to characterize, debug and test chips. the concept of the EI is different from build-in self test (BIST) and other kinds of monitors by the fact that embedded instruments can provide the user with rich and detailed information with respect to the performances of the target, not just a true/false indication. In this paper, two embedded instruments for analogue and mixed-signal IPs focusing on dependability applications are introduced. they are the EI for measuring MOS transistors' threshold voltage and the EI for testing OpAmps' gain and offset. Measurements as well as simulation results are provided to validate these EIs and show their efficiency in monitoring the ageing of analogue and mixed-signal IPs in their life time, and enable the path to enhance dependability.

关键词： ENVIRONMENTAL IMPACT STATEMENTS instructions per second Ips embedding debugger Built-in self test ACTIVE LIFE MONITOR Analog Analog EQUIPMENT formability test

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