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检索条件"任意字段=13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications"

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Response-time analysis of mixed criticality systems with pessimistic frequency specification

Response-time analysis of mixed criticality systems with pes...

引用

ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Sanjoy Baruah Bipasa Chattopadhyay The University of North Carolina

In modern embedded platforms, safety-critical functionalities that must be certified correct to very high levels of assurance may co-exist with less critical software that are not subject to certification requirements. One seeks to satisfy two, sometimes contradictory, goals upon such mixed-criticality platforms: (i) certify the safety-critical functionalities under very conservative assumptions, and (ii) achieve high resource utilization during run-time, when actual behavior does not live up to the pessimistic assumptions under which certification was made. this paper describes efforts at designing fixed-priority scheduling algorithms that balance these two requirements, when scheduling recurrent tasks that are triggered by external events of unknown exact frequency.

关键词： Certification

来源：评论

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IDAMC: A NoC for mixed criticality systems

IDAMC: A NoC for mixed criticality systems

引用

ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Sebastian Tobuschat Philip Axer Rolf Ernst Jonas Diemer Institute of Computer and Network Engineering Technische Universität Braunschweig Germany Symtavision GmbH Braunschweig Germany

Increasing demand for performance and further integration promotes the use of multi- and many-core systems - also in safety-critical embedded systems. In this domain, hardware platforms obviously have to support real-time, predictability constrained applications such as an anti-lock braking system. However, the on-going trend to integrate multiple functions with different criticalities (mixed critical) on a single platform calls for a paradigm shift. Mixed-critical systems require special attention with respect to functional (access protection) and non-functional (performance) isolation. An additional layer of protection and guaranteed service on the underlying infrastructure enables the efficient adoption of such architectures in safety-critical domains. In this paper, we present the IDAMC, a many-core platform which provides mechanisms to integrate applications of different criticalities on a single platform.

关键词： Tiles Monitoring Interference Safety Virtualization Timing time division multiple access

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A new utilization based admission control algorithm for aperiodic tasks with constant time complexity under EDF scheduling

A new utilization based admission control algorithm for aper...

引用

ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Chang Leng Ying Qiao Hongan Wang Jian Liu Xiaoqing Zhang University of Chinese Academy of Sciences Beijing China Shanxi Electric Power Research Institute Xi'an China

A low cost on-line admission controller is required by hard real-time system working in dynamic circumstances. In this paper, we propose a new utilization based constant-time admission control algorithm, called AC for aperiodic tasks under EDF scheduling. We prove that given the same processor state, AC is safe and has stronger admission capability than the best existing utilization-based admission control algorithm with constant-time complexity. Simulation results show that AC also has good performance in success ratio and efficiency.

关键词： Admission control real-time systems Heuristic algorithms Processor scheduling Algorithm design and analysis Scheduling Process control

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Multi-level adaptive hierarchical scheduling framework for composing real-time systems

Multi-level adaptive hierarchical scheduling framework for c...

引用

ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Nima Moghaddami Khalilzad Moris Behnam thomas Nolte MRTC/Mälardalen University Västerås Sweden

Processor partitioning and hierarchical scheduling have been widely used for composing hard real-time systems on a shared hardware platform while preserving the timing requirements of the systems. Due to the safety critical nature of hard real-time systems, a conservative analysis is often used for deriving a sufficient partition size. Applying the exact same analysis for deriving the partition sizes for soft real-time systems result in unnecessary processors overallocation and consequently waste of the CPU resource. In this paper, to address the problem of composing soft and hard real-time systems on a resource constrained shared hardware, we present a multi-level adaptive hierarchical scheduling framework. In our framework, we adapt the processor partition sizes of soft real-time systems according to their need at each time point by on-line monitoring their processor demand. Furthermore, we implement our adaptive framework in the Linux kernel and show the performance of our framework using a case study.

关键词： real-time systems Servers Bandwidth Timing Monitoring Adaptation models Hardware

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A space-based wear leveling for PCM-based embedded systems

A space-based wear leveling for PCM-based embedded systems

引用

ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Linbo Long Dou Liu Jingtong Hu Shouzhen Gu Qingfeng Zhuge Edwin H.-M. Sha College of Computer Science Chongqing University Chongqing China Department of Computer Science University of Texas at Dallas Richardson Texas USA

Phase change memory (PCM) has emerged as a promising candidate to replace DRAM in embedded systems. However, it can only sustain a limited number of write operations. To solve this issue, this paper proposes a novel and effective wear-leveling technique in software level to prolong the lifetime of PCM-based embedded systems. A polynomial-time algorithm, Multi-Space Wear Leveling Algorithm (MWL), is proposed to achieve effective wear-leveling. the experimental results show our technique can greatly extend the lifetime of PCM-based embedded systems compared with the previous work. Compared with the method without adopting wear-leveling, it introduces no more than 0.7% extra writes and 0.6% running overhead.

关键词： Phase change memory Software Resource management Software algorithms Acceleration Benchmark testing

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Online optimization of security-sensitive real-time storage applications for NAND flash memory storage systems

Online optimization of security-sensitive real-time storage ...

引用

ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Wei Jiang Yue Ma Xia Zhang Xupeng Wang Zili Shao College of Computer Science and Engineering University of Electronic Science and Technology of China Department of Computing The Hong Kong Polytechnic University

With many advantages like low cost, faster and non-volatile, NAND flash memory has become a critical component in building security-critical real-time embedded devices. In this paper, we are interested in online optimization of security-sensitive storage applications, whose workloads are unpredictable but have explicit deterministic or probabilistic timing constraints and certain security constraints. Sensitive data must be stored before a specific deadline, otherwise it will lose its validity. To address these challenges, this paper presents a Feedback Vulnerability and Utilization Control (FVUC) mechanism. FVUC employs two proportional-integral controllers, the Utilization Controller and Vulnerability Controller, to build a big feedback loop that dynamically monitors the system run-time status as well as decides how many flash pages would be encrypted by a cryptography algorithm. Relied on the accurate model and design, FVUC can make a balance between the utilization and vulnerability, and achieve a better overall performance. the advantages of FVUC are verified by a series of simulation experiments under a broad range of system configurations and run-time uncertainties.

关键词： real-time systems Ash Encryption Schedules Proposals

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Critical-Path-First based allocation of real-time streaming applications on 2D mesh-type multi-cores

Critical-Path-First based allocation of real-time streaming ...

引用

ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Hazem Ismail Abdel Aziz Ali Luís Miguel Pinho Benny Akesson CISTER Research Centre/INESC-TEC Polytechnic Institute of Porto Portugal Eindhoven University of Technology The Netherlands

Designing cost-efficient multi-core real-time systems requires efficient techniques to allocate applications to cores while satisfying their timing constraints. However, existing approaches typically allocate using a First-Fit algorithm, which does not consider the execution time and potential parallelism of paths in the applications, resulting in over-dimensioned systems. this work addresses this problem by proposing a new heuristic algorithm, Critical-Path-First, for the allocation of real-time streaming applications modeled as dataflow graphs on 2D mesh multi-core processors. the main criteria of the algorithm is to allocate paths that have the highest impact on the execution time of the application first. It is also able to exploit parallelism in the application by allocating parallel paths on different cores. Experimental evaluation shows that the proposed heuristic improves the resource utilization by allocating up to 7% more applications and it minimizes the average end-to-end worst-case response time of the allocated applications by up to 31%.

关键词： Resource management time factors Multicore processing Computational modeling throughput Program processors real-time systems

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A low cost embedded real time 3D stereo matching system for surveillance applications

A low cost embedded real time 3D stereo matching system for ...

引用

ieee Symposium on Bioinformatics and Bioengineering (BIBE)

作者： Georgia Rematska Kyprianos Papadimitriou Apostolos Dollas TUC School of Electronic and Computer Engineering Chania Greece

the implementation of low-cost 3D Stereo Vision systems requires stereo matching algorithms. Various efforts have been reported in the literature, however, these systems require substantial hardware resources. the contribution of the present work is on a low-cost real-time system, which was fully implemented on a small Xilinx FPGA. the system presented in this work extends previous results of the authors through design space exploration, architecture improvements and careful problem sizing.

关键词： Stereo vision Field programmable gate arrays Cameras Image resolution Resource management Table lookup

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Worst-case memory traffic analysis for many-cores using a limited migrative model

Worst-case memory traffic analysis for many-cores using a li...

引用

ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Borislav Nikolić Patrick Meumeu Yomsi Stefan M. Petters CISTER/INESC-TEC IPP Porto Portugal

the ratio between the number of cores and memory subsystems (i.e. banks and controllers) in many-core platforms is constantly increasing, leading to non-negligible latencies of memory operations. thus, in order to study the worst-case execution time of an application, it is no longer sufficient to only take into account its computational requirements, but also have to be considered latencies related to its memory operations. In this paper we study a limited migrative model applied upon many-core platforms. this approach is based on a multi-kernel paradigm [3] - a promising step towards scalable and predictable many-cores, which are essential prerequisites for the integration of such systems into the real-time embedded domain. Under that assumption, we present two analytical methods to obtain the worst-case memory traffic delays of individual applications. through experiments we test the applicability of the proposed approaches to different scenarios, and draw practical conclusions concerning routing mechanisms and a distribution of memory operations across memory controllers.

关键词： Interference Delays Switches Kernel Tiles Protocols real-time systems

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Improving GPOS real-time responsiveness using vCPU migration in an embedded multicore virtualization platform

Improving GPOS real-time responsiveness using vCPU migration...

引用

ieee international conference on embedded and real-time computing systems and applications (RTCSA)

作者： Tsung-Han Lin Hitoshi Mitake Tatsuo Nakajima Department of Computer Science and Engineering Waseda University

In this paper, a vCPU (virtual CPU) migration mechanism in order to improve real-time responsiveness in a GPOS (General Purpose Operating System) is presented in the embedded multicore virtualization platform and can also be applied to CPS environment. In a GPOS/RTOS (real time Operating System) virtualization system nowadays, tasks in GPOS, however, also need some degree of real-time services from the system. Unfortunately, in a traditional virtualization platform, a virtualization layer always gives RTOS vCPU higher priority and preempts the execution of GPOS. therefore, a kernel module in the GPOS is added in our virtualization system to export and boost a GPOS vCPU contexts which needs higher priority against RTOS vCPU. At the same time, in order not to sacrifice the performance of the victim RTOS vCPU, a vCPU migration mechanism is added to our virtualization system, and migrates the RTOS vCPU to a low-loading CPU when this vCPU is preempted. Performance improvement of GPOS's real-time responsiveness is also given while a detailed analysis of the overhead of the RTOS vCPU is performed as well.

关键词： real-time systems Linux Virtualization Virtual machine monitors Multicore processing Scheduling Kernel

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