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检索条件"任意字段=13th IEEE International Symposium on Parallel and Distributed Processing with Applications"

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High level-application analysis techniques & architectures - to explore design possibilities for reduced reconfiguration area overheads in FPGAs executing compute intensive applications

High level-application analysis techniques & architectures -...

引用

international symposium on parallel and distributed processing (IPDPS)

作者： Dasu Aravind Arvind Sudarsanam Department of ECE Utah State University USA

ISBN: (纸本)0769523129

this paper proposes a novel common subgraph extraction algorithm which aims to minimize the total number of gates (reconfiguration area overhead) involved in implementing compute-intensive scientific and media applications using reconfigurable architectures. Motivation behind the proposed research is illustrated using an example from Biochemical Algorithms Library (BALL). the design of novel context adaptable architectures to implement common subgraphs is also proposed with an example from the video warping functions of the MPEG-4 standard. three different models of mapping such architectures onto hybrid/ pure FPGA systems are proposed. Estimates obtained by applying these techniques and architectures for various media and scientific functions are shown.

关键词： Computer architecture Field programmable gate arrays Computer applications Hardware Libraries Arithmetic Data mining Design methodology Algorithm design and analysis Application software

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NUMA-aware Java heaps for server applications

NUMA-aware Java heaps for server applications

引用

international symposium on parallel and distributed processing (IPDPS)

作者： M.M. Tikir J.K. Hollingsworth Computer Science Department University of Maryland College Park MD USA

We introduce a set of techniques to both measure and optimize memory access locality of Java applications running on cc-NUMA servers. these techniques work at the object level and use information gathered from embedded hardware performance monitors. We propose a new NUMA-aware Java heap layout. In addition, we propose using dynamic object migration during garbage collection to move objects local to the processors accessing them most. Our optimization technique reduced the number of non-local memory accesses in Java workloads generated from actual runs of the SPECjbb2000 benchmark by up to 41%, and also resulted in 40% reduction in workload execution time.

关键词： Java Hardware Sun Fires Application software File servers Delay distributed computing Computer science Educational institutions

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Domain-specific reconfigurable array targeting discrete wavelet transform for system-on-chip applications

Domain-specific reconfigurable array targeting discrete wave...

引用

international symposium on parallel and distributed processing (IPDPS)

作者： S. Baloch I. Ahmed T. Arslan School of Electronic and Engineering University of Edinburgh Edinburgh UK Institute for System Level Integration The Alba Centre Livingston UK

Domain-specific heterogeneous reconfigurable arrays are for one particular domain of applications, which provide high performance over generic field programmable gate arrays (FPGAs) .this paper introduces an embedded reconfigurable array that targets discrete wavelet transform (DWT). Reconfigurable architectures are highly suitable for complex algorithms which are part of changing standards like JPEG2000 etc. the proposed reconfigurable array is flexible to implement lifting and integer based different DWT algorithms. Two benchmark DWT algorithms are implemented on three different platforms (on proposed array, on conventional FPGAs and on hardwired cores) for performance evaluation. the performance based on power consumption, timing and area, shows considerable improvement of presented arrays over FPGAs.

关键词： Discrete wavelet transforms Wavelet domain System-on-a-chip Filters Clustering algorithms Image processing Switches Multiplexing distributed processing Computer architecture

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Stable allocations in distributed real-time systems with multiple environmental parameters and replicable applications

Stable allocations in distributed real-time systems with mul...

引用

international symposium on parallel and distributed processing (IPDPS)

作者： H. Zhao D. Gu L. Welch F. Drews D. Juedes Center for Intelligent Distributed & Dependable Systems School of Electrical Engineering and Computer Science Ohio University Athens OH USA

this paper extends the previous work on the maximal allowable workload (MAW) problem [D. Juedes et al., (2004)] by investigating a resource allocation problem for distributed real-time systems that contain replicable applications. the systems may use multiple resources of a single type and be affected by multiple environmental factors. the approach searches for a feasible allocation that maximizes a user defined metric of stability. Several algorithms were developed and experiments were conducted to demonstrate the relative strength of these algorithms. the results showed that simulated annealing provides results that are the closest to the optimal for maximizing environmental parameter settings. In addition modified greedy first fit is shown to be the best performing algorithm for finding feasible allocations.

关键词： Real time systems Stability Application software Control systems Resource management Robotic assembly System performance Fluctuations Computer science Environmental factors

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A hardware acceleration unit for MPI queue processing

A hardware acceleration unit for MPI queue processing

引用

international symposium on parallel and distributed processing (IPDPS)

作者： K.D. Underwood K.S. Hemmert A. Rodrigues R. Murphy R. Brightwell Sandia National Laboratories Albuquerque NM USA

With the heavy reliance of modern scientific applications upon the MPI Standard, it has become critical for the implementation of MPI to be as capable and as fast as possible. this has led some of the fastest modern networks to introduce the capability to offload aspects of MPI processing to an embedded processor on the network interface. With this important capability has come significant performance implications. Most notably, the time to process long queues of posted receives or unexpected messages is substantially longer on embedded processors. this paper presents an associative list matching structure to accelerate the processing of moderate length queues in MPI. Simulations are used to compare the performance of an embedded processor augmented with this capability to a baseline implementation. the proposed enhancement significantly reduces latency for moderate length queues while adding virtually no overhead for extremely short queues.

关键词： Hardware Acceleration Message passing Laboratories Network interfaces Delay Prototypes Software design parallel programming Bandwidth

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Combining FT-MPI with H2O: fault-tolerant MPI across administrative boundaries

Combining FT-MPI with H2O: fault-tolerant MPI across adminis...

引用

international symposium on parallel and distributed processing (IPDPS)

作者： D. Kurzyniec Vaidy Sunderam Department of Math and Computer Science Emory University Atlanta GA USA

We observe increasing interest in aggregating geographically distributed, heterogeneous resources to perform large scale computations. MPI remains the most popular programming paradigm for such applications; however, as the size of computing environments increases, fault tolerance aspects become critically important. We argue that the fault tolerance model proposed by FT-MPI fits well in geographically distributed environments, even though its current implementation is confined to a single administrative domain. We propose to overcome these limitations by combining FT-MPI with the H2O resource sharing framework. Our approach allows users to run fault tolerant MPI programs on heterogeneous, geographically distributed shared machines, without sacrificing performance and with minimal involvement of resource providers.

关键词： Water Fault tolerance Large-scale systems Resource management Middleware Computer science distributed computing Application software Computer architecture Current measurement

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High performance communication between parallel programs

High performance communication between parallel programs

引用

international symposium on parallel and distributed processing (IPDPS)

作者： J.-Y. Lee A. Sussman UMIACS and Department of Computer Science University of Maryland College Park MD USA

We present algorithms for high performance communication between message-passing parallel programs, and evaluate the algorithms as implemented in InterComm. InterComm is a framework to couple parallel programs in the presence of complex data distributions within a coupled application. Multiple parallel libraries and languages may be used in the different programs of a single coupled application. the ability to couple such programs is required in many emerging application areas, such as complex simulations that model physical phenomena at multiple scales and resolutions, and image data analysis applications. We describe the new algorithms we have developed for computing inter-program communication patterns. We present experimental results showing the performance of various algorithmic tradeoffs, and also compare performance against an earlier system.

关键词： Libraries Wind Chaotic communication Adaptive arrays Computer science Educational institutions Computational modeling Analytical models Image resolution Data analysis

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Exploiting barriers to optimize power consumption of CMPs

Exploiting barriers to optimize power consumption of CMPs

引用

international symposium on parallel and distributed processing (IPDPS)

作者： C. Liu A. Sivasubramaniam M. Kandemir M.J. Irwin Department of Computer Science and Engineering Pennsylvania State University University Park PA USA

Power consumption is an important concern for future billion transistor designs. this paper proposes a novel technique for optimizing the power consumption of chip-multiprocessors (CMPs) using an integrated hardware-software mechanism. By using a high level synchronization construct, called the barrier, our technique tracks the idle times spent by a processor waiting for other processors to get to the same point in the program. Using this knowledge, the frequency of the processors can be modulated to reduce/eliminate these idle times, thus providing power savings without compromising on performance. Using real applications from the SpecOMP suite, and a complete system CMP simulator, we demonstrate that this approach can provide as much as 40% power savings (and 32% on the average across five applications) with little impact on performance.

关键词： Energy consumption Frequency synchronization Hardware Yarn Application software parallel processing Symbiosis Dynamic voltage scaling Voltage control Computer science

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SCADA with fault tolerant CORBA on fault tolerant LANE ATM

SCADA with fault tolerant CORBA on fault tolerant LANE ATM

引用

international symposium on parallel and distributed processing (IPDPS)

作者： David Selvakumar Chester Rebeiro R. Pitchiah Real-Time Systems Group Centre for Development of Advanced Computing Bangalore India Department of Information Technology Electronics Niketan New Delhi India

the development of complex industrial distributed systems is highly benefited from distributed object computing middleware such as CORBA. Such applications demand a high degree of reliability, and need to be resilient to faults. the OMG has addressed these requirements as part of the fault tolerant CORBA (FT-CORBA) specification. the specification handles single point of failures in CORBA applications by redundancy, fault detection and recovery. this paper presents the building and evaluation of a FT-CORBA infrastructure based on a GPL licensed ORB. the infrastructure is a collection of CORBA services that provides fault tolerance to CORBA applications. Further, fault tolerance at the network card, switch and link level is added to increase system reliability. An evaluation of this infrastructure is done with a supervisory control and data acquisition (SCADA) system and fault tolerant local area network emulation (LANE) based asynchronous transfer mode (FTATM) network is presented.

关键词： Fault tolerance LAN emulation Asynchronous transfer mode Fault tolerant systems Switches Computer industry distributed computing Middleware Redundancy Fault detection

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Power and performance in I/O for scientific applications

Power and performance in I/O for scientific applications

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international symposium on parallel and distributed processing (IPDPS)

作者： K. Coloma A. Choudhary A. Ching W.K. Liao S.W. Son M. Kandemir L. Ward Center for Ultrascale Computing and Information Security Northwestern University USA CSE Department Pennsylvania State University USA Scalable Computing Systems Department Sandia National Laboratories USA

the I/O patterns of large scale scientific applications can often be characterized as small, non-contiguous, and regular. From a performance and power perspective, this is perhaps the worse kind of I/O for a disk. Two approaches to mitigating the mechanical limitations of disks are write-back caches and software-directed power management. Previous distributed caches are plagued by synchronization and scalability issues. the direct access cache: DAChe system is a user-level distributed cached that addresses both these problems. Past work on managing disk power during run time were effective, one should be able to improve on those results by adopting a proactive scheme.

关键词： Energy management Power system management Large-scale systems Application software Energy consumption Spinning Information security Laboratories Scalability Aggregates

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