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Skyline Query processing on Interval Uncertain Data

Skyline Query Processing on Interval Uncertain Data

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ieee international symposium on Object/Component/Service-Oriented Real-Time distributed Computing Workshops (ISORCW)

作者： Xiaoyong Li Yijie Wang Xiaoling Li Guangdong Wang National Laboratory for Parallel and Distributed Processing School of Computer Science National University of Defense Technology Changsha China

Many recent applications involve processing and analyzing uncertain data. Recently, several research efforts have addressed answering skyline queries efficiently on massive uncertain datasets. However, the research lacks methods to compute these queries on uncertain data, where each dimension of the uncertain object is represented as an interval or an exact value. In this paper, we extensively study the problem of skyline query on these interval based uncertain objects, which has never been studied before. We first model the problem of querying the skylines on interval datasets. Typically, we address two efficient algorithms with I/O optimal for the conventional interval skyline queries and constrained interval skyline queries, respectively. Extensive experiments demonstrate the efficiency of all our proposed algorithms.

关键词： Probability density function Distribution functions Probability distribution Random variables Computational modeling Uncertainty distributed databases

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A loop allocation policy for DOACROSS loops

A loop allocation policy for DOACROSS loops

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international symposium on parallel and distributed processing (IPDPS)

作者： J.T. Lim A.R. Hurson K. Kavi B. Lee Computer Science and Engineering Department Pennsylvania State University University Park PA USA Computer Science and Engineering Department University of Texas Arlington Arlington TX USA Department of Electrical and Computer Engineering Oregon State University Corvallis OR USA

the dataflow model of computation, in general, and its recent direction to combine dataflow processing with control-flow processing, in particular, provide attractive alternatives to satisfy the computational demands of new applications, without experiencing the shortcomings of the traditional concurrent systems. this should motivate researchers to analyze the applicability of familiar concepts, such as scheduling and load balancing, within this new architectural framework. Effective execution of loop iterations as a means to improve performance and hardware utilization has received a great deal of attention in the past. In this paper we address the problem of scheduling/allocation of DOACROSS loops in a multithreaded dataflow environment. An extension to the staggered scheme-Cyclic staggered scheme-which produces a more balanced distribution of iterations among processors is introduced and its performance improvement in a dataflow and control-flow environment is simulated and analyzed.

关键词： Yarn parallel processing Delay Computational modeling Concurrent computing Job shop scheduling Processor scheduling Process control Hardware Switches

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the design and implementation of late binding in a distributed programming language

The design and implementation of late binding in a distribut...

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international symposium on parallel and distributed processing (IPDPS)

作者： W. Hseush G.E. Kaiser Department of Computer Science Columbia University NY USA

In distributed application domains where data change rapidly, it is often desirable for programs to obtain the latest available data values to achieve accurate computations. Example applications are financial services and network management. Such data are logically shared by a network of programs. Unlike data in traditional databases, rapidly changing data are usually not lockable by (client) programs and it is crucial to the computations to access their values in a timely manner. In these application domains, a typical program usually performs computations based on recently available data values obtained from the network. However, these data values may be inconsistent or obsolete, since the real data are external to the system and may change more rapidly than can be reflected by their copies within the system. Decision making based on such inaccurate computations can lead to substantial penalties. In this paper, we propose an approach to delaying data value retrieval until needed in distributed programming, considering data and configuration change rapidly. this approach offers the advantage of obtaining more recent data values, resulting in more accurate computations and decision making.< >

关键词： Computer languages distributed computing Computer network management Decision making Databases Computer networks Application software Financial management Delay Information retrieval

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Modeling and Predicting Performance of High Performance Computing applications on Hardware Accelerators

Modeling and Predicting Performance of High Performance Comp...

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ieee international symposium on parallel and distributed processing Workshops and Phd Forum (IPDPSW)

作者： Mitesh R. Meswani Laura Carrington Didem Unat Allan Snavely Scott Baden Stephen Poole SDSC University of California San Diego La Jolla CA USA University of California San Diego La Jolla CA USA ORNL Oak Ridge TN USA

ISBN: (纸本)9781467309745

Computers with hardware accelerators, also referred to as hybrid-core systems, speedup applications by offloading certain compute operations that can run faster on accelerators. thus, it is not surprising that many of top500 supercomputers use accelerators. However, in addition to procurement cost, significant programming and porting effort is required to realize the potential benefit of such accelerators. Hence, before building such a system it is prudent to answer the question 'what is the projected performance benefit from accelerators for the workloads of interest?'. We address this question by way of a performance-modeling framework that predicts realizable application performance on accelerators rapidly and accurately without going to the considerable effort of porting and tuning. the modeling framework first automatically identifies commonly found compute patterns in scientific applications which we term idioms, which may benefit by accelerator technology. Next the framework models the predicted speedup of those idioms if they were to be ported to and run on hardware accelerators. As a proof of concept we characterize two kinds of accelerators 1) the FPGA accelerators on a Convey HC-1 system and 2) an NVIDIA FERMI GPU accelerator. We model performance of the idioms gather/scatter and stream and our predictions show that where these occur in two full-scale HPC applications, Milc and HYCOM, gather/scatter speeds up by as much as 15X, and stream by as much as 14X, whereas the overall compute time of Milc improves by 3.4% and HYCOM by 20%.

关键词： Field programmable gate arrays Predictive models Hardware Graphics processing unit Computational modeling Bandwidth Performance evaluation

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Shared receive queue based scalable MPI design for InfiniBand clusters 06

Shared receive queue based scalable MPI design for InfiniBan...

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international symposium on parallel and distributed processing (IPDPS)

作者： S. Sur Lei Chai Hyun-Wook Jin D.K. Panda Network-Based Computing Laboratory The Ohio State University USA

ISBN: (纸本)9781424400546

Clusters of several thousand nodes interconnected with InfiniBand, an emerging high-performance interconnect, have already appeared in the Top 500 list. the next-generation InfiniBand clusters are expected to be even larger with tens-of-thousands of nodes. A high-performance scalable MPI design is crucial for MPI applications in order to exploit the massive potential for parallelism in these very large clusters. MVAPICH is a popular implementation of MPI over InfiniBand based on its reliable connection oriented model. the requirement of this model to make communication buffers available for each connection imposes a memory scalability problem. In order to mitigate this issue, the latest InfiniBand standard includes a new feature called shared receive queue (SRQ) which allows sharing of communication buffers across multiple connections. In this paper, we propose a novel MPI design which efficiently utilizes SRQs and provides very good performance. Our analytical model reveals that our proposed designs take only 1/10 th the memory requirement as compared to the original design on a cluster sized at 16,000 nodes. Performance evaluation of our design on our 8-node cluster shows that our new design was able to provide the same performance as the existing design while requiring much lesser memory. In comparison to tuned existing designs our design showed a 20% and 5% improvement in execution time of NAS Benchmarks (Class A) LU and SP, respectively. the high performance Linpack was able to execute a much larger problem size using our new design, whereas the existing design ran out of memory

关键词： Sun Large-scale systems Computer networks Laboratories Computer science parallel processing Scalability Communication standards Analytical models Radio access networks

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MATE-CG: A Map Reduce-Like Framework for Accelerating Data-Intensive Computations on Heterogeneous Clusters

MATE-CG: A Map Reduce-Like Framework for Accelerating Data-I...

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international symposium on parallel and distributed processing (IPDPS)

作者： Wei Jiang Gagan Agrawal Department of Computer Science and Engineering Ohio State University Columbus OH USA

Clusters of GPUs have rapidly emerged as the means for achieving extreme-scale, cost-effective, and powerefficient high performance computing. At the same time, high level APIs like map-reduce are being used for developing several types of high-end and/or data-intensive applications. Map-reduce, originally developed for data processing applications, has been successfully used for many classes of applications that involve a significant amount of computations, such as machine learning, image processing, and data mining applications. Because such applications can be accelerated using GPUs (and other accelerators), there has been interest in supporting map-reduce-like APIs on GPUs. However, while the use of map-reduce for a single GPU has been studied, developing map-reduce-like models for programming a heterogeneous CPU-GPU cluster remains an open challenge. this paper presents the MATE-CG system, which is a map reduce-like framework based on the generalized reduction API. We develop support for enabling scalable and efficient implementation of data-intensive applications in a heterogeneous cluster of multi-core CPUs and many-core GPUs. Our contributions are three folds: 1) we port the generalized reduction model on clusters of modern GPUs with a map-reduce-like API, dealing with very large datasets, 2) we further propose three schemes to better utilize the computing power of CPUs and/or GPUs and develop an auto-tuning strategy to achieve the best-possible heterogeneous configuration for iterative applications, 3) we show how analytical models can be used to optimize important parameters in our system. We evaluate our system using three representative data intensive applications and report results on a heterogeneous cluster of 128 CPU cores and 16 GPUs (7168 GPU cores). We show an average speedup of 87× on this cluster over execution with 2 CPU-cores. Our applications also achieve an average improvement of 25% by using CPU cores and GPUs simultaneously, over the best p

关键词： Graphics processing unit Runtime Analytical models Acceleration Data processing Computational modeling Multicore processing

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Task Scheduling for GPU Accelerated Hybrid OLAP Systems with Multi-core Support and Text-to-Integer Translation

Task Scheduling for GPU Accelerated Hybrid OLAP Systems with...

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ieee international symposium on parallel and distributed processing Workshops and Phd Forum (IPDPSW)

作者： Maria Malik Lubomir Riha Colin Shea Tarek El-Ghazawi Department of Electrical and Computer Engineering George Washington University Washington DC DC USA

ISBN: (纸本)9781467309745

OLAP (On-Line Analytical processing) is a powerful method for analyzing the excessive amount of data related to business intelligence applications. OLAP utilizes the efficient multidimensional data structure referred to as the OLAP cube to answer multi-faceted analytical queries. As queries become more complex and the dimensionality and size of the cube grows, the processing time required to aggregate queries increases. In this paper, we are proposing: (1) a parallel implementation of MOLAP cube using OpenMP, (2) a text-to-integer translation method to allow effective string processing on GPU, and (3) a new scheduling algorithm that support these new features. To be able to process string queries on the GPU, we are introducing a text-to-integer translation method which works with multiple dictionaries. the translation is necessary only for the GPU side of the system. To support the translation and parallel CPU implementation, a new scheduling algorithm is proposed. the scheduler divides multi-core processor(s) of a shared memory system into a processing partition and a preprocessing (or translation) partition. the performance of the new system is evaluated. the text-to-integer translation adds a new vital functionality to our system, however it also slows down the GPU processing by 7% when compare to original implementation without string support. the performance measurements indicate that due to the parallel implementation, the processing rate of the CPU partition improves from 12 to 110 queries per second. Moreover, the CPU partition is now able to process OLAP cubes of size 32 GB at rate of 11 queries per second. the total performance of the entire hybrid system (CPU + GPU) increased from 102 to 228 queries per second.

关键词： Graphics processing unit Instruction sets Estimation Bandwidth Dictionaries Processor scheduling Arrays

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Enhancing software DSM for compiler-parallelized applications

Enhancing software DSM for compiler-parallelized application...

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international symposium on parallel processing

作者： P. Keleher Chau-Wen Tseng Department of Computer Science University of Maryland College Park MD USA

Current parallelizing compilers for message-passing machines only support a limited class of data-parallel applications. One method for eliminating this restriction is to combine powerful shared-memory parallelizing compilers with software distributed shared-memory (DSM) systems. We demonstrate such a system by combining the SUIF parallelizing compiler and the CVM software DSM. Innovations of the system include compiler-directed techniques that: (1) combine synchronization and parallelism information communication on parallel task invocation, (2) employ customized routines for evaluating reduction operations, and (3) select a hybrid update protocol that pre-sends data by flushing updates at barriers. For applications with sufficient granularity of parallelism, these optimizations yield very good eight processor speedups on an IBM SP-2 and DEC Alpha cluster usually matching or exceeding the speedup of equivalent HPF and message-passing versions of each program. Flushing updates, in particular, eliminates almost all nonlocal memory misses and improves performance by 13% on average.

关键词： Application software Program processors parallel processing Protocols Computer architecture Concurrent computing parallel machines Workstations Software performance Computer science

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Centralized versus distributed schedulers for multiple bag-of-task applications 06

Centralized versus distributed schedulers for multiple bag-o...

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international symposium on parallel and distributed processing (IPDPS)

作者： O. Beaumont L. Carter J. Ferrante A. Legrand L. Marchal Y. Robert Laboratoire LaBRI CNRS-INRIA France Department of Computer Science and Engineering University of California San Diego USA Laboratoire ID-IMAG CNRS-INRIA Grenoble France Laboratoire LIP CNRS-INRIA École Normale Supérieure de Lyon France

ISBN: (纸本)9781424400546

Multiple applications that execute concurrently on heterogeneous platforms compete for CPU and network resources. In this paper, we consider the problem of scheduling applications to ensure fair and efficient execution on a distributed network of processors. We limit our study to the case where communication is restricted to a tree embedded in the network, and the applications consist of a large number of independent tasks that originate at the tree's root. the tasks of a given application all have the same computation and communication requirements, but these requirements can vary for different applications. Each application is given a weight that quantifies its relative value. the goal of scheduling is to maximize throughput while executing tasks from each application in the same ratio as their weights. We can find the optimal asymptotic rates by solving a linear program that expresses all necessary problem constraints, and we show how to construct a periodic schedule. For single-level trees, the solution is characterized by processing tasks with larger communication-to-computation ratios at children with larger bandwidths. For multi-level trees, this approach requires global knowledge of all application and platform parameters. For large-scale platforms, such global coordination by a centralized scheduler may be unrealistic. thus, we also investigate decentralized schedulers that use only local information at each participating resource. We assess their performance via simulation, and compare to a centralized solution obtained via linear programming. the best of our decentralized heuristics achieves the same performance on about two-thirds of our test cases, but is far worse in a few cases. While our results are based on simplistic assumptions and do not explore all parameters (such as buffer size), they provide insight into the important question of fairly and optimally co-scheduling heterogeneous applications on heterogeneous grids

关键词： Processor scheduling Application software throughput Bandwidth Central processing Unit Computer networks Computer science Large-scale systems Linear programming Testing

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GPU Usage trends in Medical Image processing

GPU Usage trends in Medical Image processing

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international symposium on Applied Computational Intelligence and Informatics ( SACI)

作者： Abdallah BENHAMIDA Miklos KOZLOVSZKY Sándor SZÉNÁSI BioTech Research Center EKIK Óbuda University Budapest Hungary John von Neumann Faculty of Informatics Óbuda University Budapest Hungary

ISBN: (数字)9781728106861

ISBN: (纸本)9781728106878

Graphics processing units (GPUs), mainly named as general-purpose computing on graphics processing units (GPGPUs) became a widely used technology for many computer-aided procedures in different research or industry areas that require high algorithmic computation capabilities for parallel computing tasks. In the field of bioinformatics and especially in medical image processing, GPUs play an essential role to enable high performance and computation capabilities in order to facilitate the tasks related to image processing. this paper highlights the usage of the graphics processing units in medical image processing and three-dimensional medical image processing related applications (computer-aided image processing, volume rendering, and segmentation), such as image segmentation, noise reduction or denoising, and image registration. It gives a deep understanding of the influence of GPU cards on general purpose programming GPGPU in general and on medical image processing specifically. It presents a good starting point for further applications of GPU programming in the field of biomedical applications and mainly for medical image processing that requires high-performance capabilities for medical image treatment shortly after the medical imaging activity such as in the ICU or the emergency services.

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